Lines Matching +full:armv7 +full:- +full:timer
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
24 next-level-cache = <&L2_0>;
25 enable-method = "psci";
30 compatible = "arm,cortex-a7";
32 next-level-cache = <&L2_0>;
33 enable-method = "psci";
38 compatible = "arm,cortex-a7";
40 next-level-cache = <&L2_0>;
41 enable-method = "psci";
46 compatible = "arm,cortex-a7";
48 next-level-cache = <&L2_0>;
49 enable-method = "psci";
52 L2_0: l2-cache0 {
57 timer {
58 compatible = "arm,armv7-timer";
63 arm,cpu-registers-not-fw-configured;
67 compatible = "arm,cortex-a7-pmu";
72 interrupt-affinity = <&CA7_0>, <&CA7_1>,
77 periph_clk: periph-clk {
78 compatible = "fixed-clock";
79 #clock-cells = <0>;
80 clock-frequency = <200000000>;
83 uart_clk: uart-clk {
84 compatible = "fixed-factor-clock";
85 #clock-cells = <0>;
87 clock-div = <4>;
88 clock-mult = <1>;
93 compatible = "arm,psci-0.2";
98 compatible = "simple-bus";
99 #address-cells = <1>;
100 #size-cells = <1>;
103 gic: interrupt-controller@1000 {
104 compatible = "arm,cortex-a7-gic";
105 #interrupt-cells = <3>;
106 interrupt-controller;
116 compatible = "simple-bus";
117 #address-cells = <1>;
118 #size-cells = <1>;
126 clock-names = "uartclk", "apb_pclk";