Lines Matching +full:armv7 +full:- +full:timer
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
14 interrupt-parent = <&gic>;
17 #address-cells = <1>;
18 #size-cells = <0>;
22 compatible = "arm,cortex-a7";
24 next-level-cache = <&L2_0>;
25 enable-method = "psci";
30 compatible = "arm,cortex-a7";
32 next-level-cache = <&L2_0>;
33 enable-method = "psci";
38 compatible = "arm,cortex-a7";
40 next-level-cache = <&L2_0>;
41 enable-method = "psci";
44 L2_0: l2-cache0 {
49 timer {
50 compatible = "arm,armv7-timer";
55 arm,cpu-registers-not-fw-configured;
59 compatible = "arm,cortex-a7-pmu";
63 interrupt-affinity = <&CA7_0>, <&CA7_1>,
68 periph_clk: periph-clk {
69 compatible = "fixed-clock";
70 #clock-cells = <0>;
71 clock-frequency = <200000000>;
73 uart_clk: uart-clk {
74 compatible = "fixed-factor-clock";
75 #clock-cells = <0>;
77 clock-div = <4>;
78 clock-mult = <1>;
83 compatible = "arm,psci-0.2";
88 compatible = "simple-bus";
89 #address-cells = <1>;
90 #size-cells = <1>;
93 gic: interrupt-controller@1000 {
94 compatible = "arm,cortex-a7-gic";
95 #interrupt-cells = <3>;
96 interrupt-controller;
106 compatible = "simple-bus";
107 #address-cells = <1>;
108 #size-cells = <1>;
116 clock-names = "uartclk", "apb_pclk";