Lines Matching +full:ns +full:- +full:thermal
6 * Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
11 #include <dt-bindings/clock/bcm-nsp.h>
12 #include <dt-bindings/gpio/gpio.h>
13 #include <dt-bindings/input/input.h>
14 #include <dt-bindings/interrupt-controller/irq.h>
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 #address-cells = <1>;
19 #size-cells = <1>;
20 interrupt-parent = <&gic>;
22 chipcommon-a-bus@18000000 {
23 compatible = "simple-bus";
25 #address-cells = <1>;
26 #size-cells = <1>;
41 pinctrl-names = "default";
42 pinctrl-0 = <&pinmux_uart1>;
47 mpcore-bus@19000000 {
48 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
54 #clock-cells = <0>;
55 compatible = "brcm,nsp-armpll";
61 compatible = "arm,cortex-a9-scu";
66 compatible = "arm,cortex-a9-global-timer";
73 compatible = "arm,cortex-a9-twd-timer";
81 compatible = "arm,cortex-a9-twd-wdt";
88 gic: interrupt-controller@21000 {
89 compatible = "arm,cortex-a9-gic";
90 #interrupt-cells = <3>;
91 #address-cells = <0>;
92 interrupt-controller;
97 L2: cache-controller@22000 {
98 compatible = "arm,pl310-cache";
100 cache-unified;
101 arm,shared-override;
102 prefetch-data = <1>;
103 prefetch-instr = <1>;
104 cache-level = <2>;
109 compatible = "arm,cortex-a9-pmu";
116 #address-cells = <1>;
117 #size-cells = <1>;
121 #clock-cells = <0>;
122 compatible = "fixed-clock";
123 clock-frequency = <25000000>;
127 #clock-cells = <0>;
128 compatible = "fixed-factor-clock";
130 clock-div = <2>;
131 clock-mult = <1>;
135 #clock-cells = <0>;
136 compatible = "fixed-factor-clock";
138 clock-div = <4>;
139 clock-mult = <1>;
143 #clock-cells = <0>;
144 compatible = "fixed-factor-clock";
146 clock-div = <2>;
147 clock-mult = <1>;
152 compatible = "brcm,bus-axi";
155 #address-cells = <1>;
156 #size-cells = <1>;
158 #interrupt-cells = <1>;
159 interrupt-map-mask = <0x000fffff 0xffff>;
160 interrupt-map =
234 gpio-controller;
235 #gpio-cells = <2>;
236 interrupt-controller;
237 #interrupt-cells = <2>;
255 #address-cells = <1>;
256 #size-cells = <1>;
259 interrupt-parent = <&gic>;
262 #usb-cells = <0>;
264 compatible = "generic-ehci";
269 #address-cells = <1>;
270 #size-cells = <0>;
274 #trigger-source-cells = <0>;
279 #trigger-source-cells = <0>;
284 #usb-cells = <0>;
286 compatible = "generic-ohci";
290 #address-cells = <1>;
291 #size-cells = <0>;
295 #trigger-source-cells = <0>;
300 #trigger-source-cells = <0>;
308 #address-cells = <1>;
309 #size-cells = <1>;
312 interrupt-parent = <&gic>;
315 #usb-cells = <0>;
317 compatible = "generic-xhci";
321 phy-names = "usb";
323 #address-cells = <1>;
324 #size-cells = <0>;
328 #trigger-source-cells = <0>;
351 compatible = "brcm,iproc-pwm";
354 #pwm-cells = <3>;
359 compatible = "brcm,iproc-mdio";
361 #size-cells = <0>;
362 #address-cells = <1>;
365 mdio-mux@18003000 {
366 compatible = "mdio-mux-mmioreg", "mdio-mux";
367 mdio-parent-bus = <&mdio>;
368 #address-cells = <1>;
369 #size-cells = <0>;
371 mux-mask = <0x200>;
375 #address-cells = <1>;
376 #size-cells = <0>;
378 usb3_phy: usb3-phy@10 {
379 compatible = "brcm,ns-ax-usb3-phy";
381 usb3-dmp-syscon = <&usb3_dmp>;
382 #phy-cells = <0>;
397 reg-shift = <2>;
402 compatible = "brcm,iproc-i2c";
405 #address-cells = <1>;
406 #size-cells = <0>;
407 clock-frequency = <100000>;
411 dmu-bus@1800c000 {
412 compatible = "simple-bus";
414 #address-cells = <1>;
415 #size-cells = <1>;
417 cru-bus@100 {
418 compatible = "brcm,ns-cru", "simple-mfd";
421 #address-cells = <1>;
422 #size-cells = <1>;
424 lcpll0: clock-controller@100 {
425 #clock-cells = <1>;
426 compatible = "brcm,nsp-lcpll0";
429 clock-output-names = "lcpll0", "pcie_phy",
433 genpll: clock-controller@140 {
434 #clock-cells = <1>;
435 compatible = "brcm,nsp-genpll";
438 clock-output-names = "genpll", "phy",
445 compatible = "brcm,ns-usb2-phy";
447 brcm,syscon-clkset = <&cru_clkset>;
449 clock-names = "phy-ref-clk";
450 #phy-cells = <0>;
454 compatible = "brcm,cru-clkset", "syscon";
459 compatible = "brcm,bcm4708-pinmux";
461 reg-names = "cru_gpio_control";
463 spi-pins {
468 pinmux_i2c: i2c-pins {
473 pinmux_pwm: pwm-pins {
479 pinmux_uart1: uart1-pins {
485 thermal: thermal@2c0 { label
486 compatible = "brcm,ns-thermal";
488 #thermal-sensor-cells = <0>;
493 srab: ethernet-switch@18007000 {
494 compatible = "brcm,bcm53011-srab", "brcm,bcm5301x-srab";
501 #address-cells = <1>;
502 #size-cells = <0>;
507 compatible = "brcm,bcm5301x-rng";
511 nand_controller: nand-controller@18028000 {
512 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1", "brcm,brcmnand";
514 reg-names = "nand", "iproc-idm", "iproc-ext";
517 #address-cells = <1>;
518 #size-cells = <0>;
520 brcm,nand-has-wp;
524 compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
529 reg-names = "mspi", "bspi", "intr_regs", "intr_status_reg";
537 interrupt-names = "mspi_done",
545 clock-names = "iprocmed";
546 num-cs = <2>;
547 #address-cells = <1>;
548 #size-cells = <0>;
551 compatible = "jedec,spi-nor";
553 spi-max-frequency = <20000000>;
557 compatible = "brcm,bcm947xx-cfe-partitions";
562 thermal-zones {
563 cpu_thermal: cpu-thermal {
564 polling-delay-passive = <0>;
565 polling-delay = <1000>;
566 coefficients = <(-556) 418000>;
567 thermal-sensors = <&thermal>;
570 cpu-crit {
577 cooling-maps {