Lines Matching +full:0 +full:x118
22 #size-cells = <0>;
24 cpu0: cpu@0 {
27 reg = <0>;
34 secondary-boot-reg = <0x35004178>;
42 #address-cells = <0>;
44 reg = <0x3ff01000 0x1000>,
45 <0x3ff00100 0x100>;
50 reg = <0x3404e000 0x400>; /* 1 KiB in SRAM */
56 reg = <0x3e000000 0x118>;
66 reg = <0x3e001000 0x118>;
76 reg = <0x3e002000 0x118>;
85 reg = <0x3ff20000 0x1000>;
92 reg = <0x35001f00 0x24>;
97 reg = <0x35006000 0x1c>;
104 reg = <0x35003000 0x524>;
118 reg = <0x3f180000 0x801c>;
126 reg = <0x3f190000 0x801c>;
134 reg = <0x3f1a0000 0x801c>;
142 reg = <0x3f1b0000 0x801c>;
150 reg = <0x3e016000 0x70>;
153 #size-cells = <0>;
160 reg = <0x3e017000 0x70>;
163 #size-cells = <0>;
170 reg = <0x3e018000 0x70>;
173 #size-cells = <0>;
180 reg = <0x3e01c000 0x70>;
183 #size-cells = <0>;
199 #clock-cells = <0>;
205 #clock-cells = <0>;
211 #clock-cells = <0>;
217 #clock-cells = <0>;
223 #clock-cells = <0>;
229 #clock-cells = <0>;
235 #clock-cells = <0>;
241 #clock-cells = <0>;
247 #clock-cells = <0>;
253 #clock-cells = <0>;
259 #clock-cells = <0>;
265 #clock-cells = <0>;
271 #clock-cells = <0>;
277 #clock-cells = <0>;
283 #clock-cells = <0>;
290 reg = <0x35001000 0x0f00>;
297 reg = <0x35002000 0x0f00>;
304 reg = <0x3f001000 0x0f00>;
318 reg = <0x3e011000 0x0f00>;
332 reg = <0x3f120000 0x10000>;
343 reg = <0x3f130000 0x28>;
344 #phy-cells = <0>;