Lines Matching +full:msi +full:- +full:map
33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
39 interrupt-parent = <&gic>;
40 #address-cells = <1>;
41 #size-cells = <1>;
44 #address-cells = <1>;
45 #size-cells = <0>;
49 compatible = "arm,cortex-a9";
50 next-level-cache = <&L2>;
56 compatible = "arm,cortex-a9-pmu";
59 interrupt-affinity = <&cpu0>;
63 compatible = "simple-bus";
65 #address-cells = <1>;
66 #size-cells = <1>;
69 #clock-cells = <0>;
70 compatible = "brcm,hr2-armpll";
76 compatible = "arm,cortex-a9-global-timer";
82 twd-timer@20600 {
83 compatible = "arm,cortex-a9-twd-timer";
90 twd-watchdog@20620 {
91 compatible = "arm,cortex-a9-twd-wdt";
98 gic: interrupt-controller@21000 {
99 compatible = "arm,cortex-a9-gic";
100 #interrupt-cells = <3>;
101 #address-cells = <0>;
102 interrupt-controller;
107 L2: cache-controller@22000 {
108 compatible = "arm,pl310-cache";
110 cache-unified;
111 cache-level = <2>;
116 #address-cells = <1>;
117 #size-cells = <1>;
121 #clock-cells = <0>;
122 compatible = "fixed-clock";
123 clock-frequency = <25000000>;
127 #clock-cells = <0>;
128 compatible = "fixed-factor-clock";
130 clock-div = <2>;
131 clock-mult = <1>;
136 compatible = "simple-bus";
138 #address-cells = <1>;
139 #size-cells = <1>;
169 #dma-cells = <1>;
174 compatible = "brcm,nsp-amac";
177 reg-names = "amac_base", "idm_base";
182 nand_controller: nand-controller@26000 {
183 compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
187 reg-names = "nand", "iproc-idm", "iproc-ext";
190 #address-cells = <1>;
191 #size-cells = <0>;
193 brcm,nand-has-wp;
197 compatible = "brcm,iproc-hr2-gpio", "brcm,iproc-gpio";
199 #gpio-cells = <2>;
200 gpio-controller;
202 interrupt-controller;
207 compatible = "brcm,iproc-pwm";
210 #pwm-cells = <3>;
215 compatible = "brcm,bcm-nsp-rng";
220 compatible = "brcm,spi-nsp-qspi", "brcm,spi-bcm-qspi";
225 reg-names = "mspi", "bspi", "intr_regs",
234 interrupt-names = "spi_lr_fullness_reached",
241 num-cs = <2>;
242 #address-cells = <1>;
243 #size-cells = <0>;
263 compatible = "brcm,iproc-i2c";
265 #address-cells = <1>;
266 #size-cells = <0>;
268 clock-frequency = <100000>;
278 compatible = "brcm,iproc-i2c";
280 #address-cells = <1>;
281 #size-cells = <0>;
283 clock-frequency = <100000>;
288 compatible = "cfi-flash", "jedec-flash";
291 #address-cells = <1>;
292 #size-cells = <1>;
298 compatible = "brcm,iproc-pcie";
301 #interrupt-cells = <1>;
302 interrupt-map-mask = <0 0 0 0>;
303 interrupt-map = <0 0 0 0 &gic GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
305 linux,pci-domain = <0>;
307 bus-range = <0x00 0xff>;
309 #address-cells = <3>;
310 #size-cells = <2>;
320 msi-parent = <&msi0>;
321 msi0: msi {
322 compatible = "brcm,iproc-msi";
323 msi-controller;
324 interrupt-parent = <&gic>;
329 brcm,pcie-msi-inten;
334 compatible = "brcm,iproc-pcie";
337 #interrupt-cells = <1>;
338 interrupt-map-mask = <0 0 0 0>;
339 interrupt-map = <0 0 0 0 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>;
341 linux,pci-domain = <1>;
343 bus-range = <0x00 0xff>;
345 #address-cells = <3>;
346 #size-cells = <2>;
356 msi-parent = <&msi1>;
357 msi1: msi {
358 compatible = "brcm,iproc-msi";
359 msi-controller;
360 interrupt-parent = <&gic>;
365 brcm,pcie-msi-inten;