Lines Matching +full:syscon +full:- +full:pcie +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
52 compatible = "simple-bus";
53 #address-cells = <1>;
54 #size-cells = <1>;
59 #address-cells = <1>;
60 #size-cells = <0>;
61 compatible = "aspeed,ast2500-fmc";
62 clocks = <&syscon ASPEED_CLK_AHB>;
67 compatible = "jedec,spi-nor";
68 spi-max-frequency = <50000000>;
69 spi-rx-bus-width = <2>;
74 compatible = "jedec,spi-nor";
75 spi-max-frequency = <50000000>;
76 spi-rx-bus-width = <2>;
81 compatible = "jedec,spi-nor";
82 spi-max-frequency = <50000000>;
83 spi-rx-bus-width = <2>;
90 #address-cells = <1>;
91 #size-cells = <0>;
92 compatible = "aspeed,ast2500-spi";
93 clocks = <&syscon ASPEED_CLK_AHB>;
97 compatible = "jedec,spi-nor";
98 spi-max-frequency = <50000000>;
99 spi-rx-bus-width = <2>;
104 compatible = "jedec,spi-nor";
105 spi-max-frequency = <50000000>;
106 spi-rx-bus-width = <2>;
113 #address-cells = <1>;
114 #size-cells = <0>;
115 compatible = "aspeed,ast2500-spi";
116 clocks = <&syscon ASPEED_CLK_AHB>;
120 compatible = "jedec,spi-nor";
121 spi-max-frequency = <50000000>;
122 spi-rx-bus-width = <2>;
127 compatible = "jedec,spi-nor";
128 spi-max-frequency = <50000000>;
129 spi-rx-bus-width = <2>;
134 vic: interrupt-controller@1e6c0080 {
135 compatible = "aspeed,ast2400-vic";
136 interrupt-controller;
137 #interrupt-cells = <1>;
138 valid-sources = <0xfefff7ff 0x0807ffff>;
142 cvic: copro-interrupt-controller@1e6c2000 {
143 compatible = "aspeed,ast2500-cvic", "aspeed-cvic";
144 valid-sources = <0xffffffff>;
145 copro-sw-interrupts = <1>;
150 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
153 clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
158 compatible = "aspeed,ast2500-mac", "faraday,ftgmac100";
161 clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
166 compatible = "aspeed,ast2500-ehci", "generic-ehci";
169 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
170 pinctrl-names = "default";
171 pinctrl-0 = <&pinctrl_usb2ah_default>;
176 compatible = "aspeed,ast2500-ehci", "generic-ehci";
179 clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
180 pinctrl-names = "default";
181 pinctrl-0 = <&pinctrl_usb2bh_default>;
186 compatible = "aspeed,ast2500-uhci", "generic-uhci";
190 clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
198 vhub: usb-vhub@1e6a0000 {
199 compatible = "aspeed,ast2500-usb-vhub";
202 clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
203 aspeed,vhub-downstream-ports = <5>;
204 aspeed,vhub-generic-endpoints = <15>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_usb2ad_default>;
211 compatible = "simple-bus";
212 #address-cells = <1>;
213 #size-cells = <1>;
216 edac: memory-controller@1e6e0000 {
217 compatible = "aspeed,ast2500-sdram-edac";
223 syscon: syscon@1e6e2000 { label
224 compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd";
226 #address-cells = <1>;
227 #size-cells = <1>;
229 #clock-cells = <1>;
230 #reset-cells = <1>;
232 scu_ic: interrupt-controller@18 {
233 #interrupt-cells = <1>;
234 compatible = "aspeed,ast2500-scu-ic";
237 interrupt-controller;
240 p2a: p2a-control@2c {
241 compatible = "aspeed,ast2500-p2a-ctrl";
246 silicon-id@7c {
247 compatible = "aspeed,ast2500-silicon-id", "aspeed,silicon-id";
252 compatible = "aspeed,ast2500-pinctrl";
254 aspeed,external-nodes = <&gfx>, <&lhc>;
266 compatible = "aspeed,ast2500-hace";
269 clocks = <&syscon ASPEED_CLK_GATE_YCLK>;
270 resets = <&syscon ASPEED_RESET_HACE>;
274 compatible = "aspeed,ast2500-gfx", "syscon";
276 reg-io-width = <4>;
277 clocks = <&syscon ASPEED_CLK_GATE_D1CLK>;
278 resets = <&syscon ASPEED_RESET_CRT1>;
279 syscon = <&syscon>;
285 compatible = "aspeed,ast2500-xdma";
287 clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
288 resets = <&syscon ASPEED_RESET_XDMA>;
289 interrupts-extended = <&vic 6>, <&scu_ic ASPEED_AST2500_SCU_IC_PCIE_RESET_LO_TO_HI>;
290 aspeed,pcie-device = "bmc";
291 aspeed,scu = <&syscon>;
296 compatible = "aspeed,ast2500-adc";
298 clocks = <&syscon ASPEED_CLK_APB>;
299 resets = <&syscon ASPEED_RESET_ADC>;
300 #io-channel-cells = <1>;
305 compatible = "aspeed,ast2500-video-engine";
307 clocks = <&syscon ASPEED_CLK_GATE_VCLK>,
308 <&syscon ASPEED_CLK_GATE_ECLK>;
309 clock-names = "vclk", "eclk";
315 compatible = "mmio-sram";
319 sdmmc: sd-controller@1e740000 {
320 compatible = "aspeed,ast2500-sd-controller";
322 #address-cells = <1>;
323 #size-cells = <1>;
325 clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
329 compatible = "aspeed,ast2500-sdhci";
332 sdhci,auto-cmd12;
333 clocks = <&syscon ASPEED_CLK_SDIO>;
338 compatible = "aspeed,ast2500-sdhci";
341 sdhci,auto-cmd12;
342 clocks = <&syscon ASPEED_CLK_SDIO>;
348 #gpio-cells = <2>;
349 gpio-controller;
350 compatible = "aspeed,ast2500-gpio";
353 gpio-ranges = <&pinctrl 0 0 232>;
354 clocks = <&syscon ASPEED_CLK_APB>;
355 interrupt-controller;
356 #interrupt-cells = <2>;
360 #gpio-cells = <2>;
361 compatible = "aspeed,ast2500-sgpio";
362 gpio-controller;
365 clocks = <&syscon ASPEED_CLK_APB>;
366 interrupt-controller;
367 bus-frequency = <12000000>;
368 pinctrl-names = "default";
369 pinctrl-0 = <&pinctrl_sgpm_default>;
374 compatible = "aspeed,ast2500-rtc";
381 compatible = "aspeed,ast2400-timer";
384 clocks = <&syscon ASPEED_CLK_APB>;
385 clock-names = "PCLK";
391 reg-shift = <2>;
393 clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
395 no-loopback-test;
402 reg-shift = <2>;
404 clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
405 no-loopback-test;
410 compatible = "aspeed,ast2500-wdt";
412 clocks = <&syscon ASPEED_CLK_APB>;
416 compatible = "aspeed,ast2500-wdt";
418 clocks = <&syscon ASPEED_CLK_APB>;
422 compatible = "aspeed,ast2500-wdt";
424 clocks = <&syscon ASPEED_CLK_APB>;
428 pwm_tacho: pwm-tacho-controller@1e786000 {
429 compatible = "aspeed,ast2500-pwm-tacho";
430 #address-cells = <1>;
431 #size-cells = <0>;
433 clocks = <&syscon ASPEED_CLK_24M>;
434 resets = <&syscon ASPEED_RESET_PWM>;
439 compatible = "aspeed,ast2500-vuart";
441 reg-shift = <2>;
443 clocks = <&syscon ASPEED_CLK_APB>;
444 no-loopback-test;
449 compatible = "aspeed,ast2500-lpc-v2", "simple-mfd", "syscon";
451 reg-io-width = <4>;
453 #address-cells = <1>;
454 #size-cells = <1>;
458 compatible = "aspeed,ast2500-kcs-bmc-v2";
461 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
466 compatible = "aspeed,ast2500-kcs-bmc-v2";
469 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
474 compatible = "aspeed,ast2500-kcs-bmc-v2";
477 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
482 compatible = "aspeed,ast2500-kcs-bmc-v2";
485 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
489 lpc_ctrl: lpc-ctrl@80 {
490 compatible = "aspeed,ast2500-lpc-ctrl";
492 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
496 lpc_snoop: lpc-snoop@90 {
497 compatible = "aspeed,ast2500-lpc-snoop";
500 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
504 lpc_reset: reset-controller@98 {
505 compatible = "aspeed,ast2500-lpc-reset";
507 #reset-cells = <1>;
510 uart_routing: uart-routing@9c {
511 compatible = "aspeed,ast2500-uart-routing";
517 compatible = "aspeed,ast2500-lhc";
523 compatible = "aspeed,ast2500-ibt-bmc";
526 clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
531 peci0: peci-controller@1e78b000 {
532 compatible = "aspeed,ast2500-peci";
535 clocks = <&syscon ASPEED_CLK_GATE_REFCLK>;
536 resets = <&syscon ASPEED_RESET_PECI>;
537 cmd-timeout-ms = <1000>;
538 clock-frequency = <1000000>;
545 reg-shift = <2>;
547 clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
549 no-loopback-test;
556 reg-shift = <2>;
558 clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
560 no-loopback-test;
567 reg-shift = <2>;
569 clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
571 no-loopback-test;
576 compatible = "simple-bus";
577 #address-cells = <1>;
578 #size-cells = <1>;
586 i2c_ic: interrupt-controller@0 {
587 #interrupt-cells = <1>;
588 compatible = "aspeed,ast2500-i2c-ic";
591 interrupt-controller;
594 i2c0: i2c-bus@40 {
595 #address-cells = <1>;
596 #size-cells = <0>;
597 #interrupt-cells = <1>;
600 compatible = "aspeed,ast2500-i2c-bus";
601 clocks = <&syscon ASPEED_CLK_APB>;
602 resets = <&syscon ASPEED_RESET_I2C>;
603 bus-frequency = <100000>;
605 interrupt-parent = <&i2c_ic>;
610 i2c1: i2c-bus@80 {
611 #address-cells = <1>;
612 #size-cells = <0>;
613 #interrupt-cells = <1>;
616 compatible = "aspeed,ast2500-i2c-bus";
617 clocks = <&syscon ASPEED_CLK_APB>;
618 resets = <&syscon ASPEED_RESET_I2C>;
619 bus-frequency = <100000>;
621 interrupt-parent = <&i2c_ic>;
626 i2c2: i2c-bus@c0 {
627 #address-cells = <1>;
628 #size-cells = <0>;
629 #interrupt-cells = <1>;
632 compatible = "aspeed,ast2500-i2c-bus";
633 clocks = <&syscon ASPEED_CLK_APB>;
634 resets = <&syscon ASPEED_RESET_I2C>;
635 bus-frequency = <100000>;
637 interrupt-parent = <&i2c_ic>;
638 pinctrl-names = "default";
639 pinctrl-0 = <&pinctrl_i2c3_default>;
643 i2c3: i2c-bus@100 {
644 #address-cells = <1>;
645 #size-cells = <0>;
646 #interrupt-cells = <1>;
649 compatible = "aspeed,ast2500-i2c-bus";
650 clocks = <&syscon ASPEED_CLK_APB>;
651 resets = <&syscon ASPEED_RESET_I2C>;
652 bus-frequency = <100000>;
654 interrupt-parent = <&i2c_ic>;
655 pinctrl-names = "default";
656 pinctrl-0 = <&pinctrl_i2c4_default>;
660 i2c4: i2c-bus@140 {
661 #address-cells = <1>;
662 #size-cells = <0>;
663 #interrupt-cells = <1>;
666 compatible = "aspeed,ast2500-i2c-bus";
667 clocks = <&syscon ASPEED_CLK_APB>;
668 resets = <&syscon ASPEED_RESET_I2C>;
669 bus-frequency = <100000>;
671 interrupt-parent = <&i2c_ic>;
672 pinctrl-names = "default";
673 pinctrl-0 = <&pinctrl_i2c5_default>;
677 i2c5: i2c-bus@180 {
678 #address-cells = <1>;
679 #size-cells = <0>;
680 #interrupt-cells = <1>;
683 compatible = "aspeed,ast2500-i2c-bus";
684 clocks = <&syscon ASPEED_CLK_APB>;
685 resets = <&syscon ASPEED_RESET_I2C>;
686 bus-frequency = <100000>;
688 interrupt-parent = <&i2c_ic>;
689 pinctrl-names = "default";
690 pinctrl-0 = <&pinctrl_i2c6_default>;
694 i2c6: i2c-bus@1c0 {
695 #address-cells = <1>;
696 #size-cells = <0>;
697 #interrupt-cells = <1>;
700 compatible = "aspeed,ast2500-i2c-bus";
701 clocks = <&syscon ASPEED_CLK_APB>;
702 resets = <&syscon ASPEED_RESET_I2C>;
703 bus-frequency = <100000>;
705 interrupt-parent = <&i2c_ic>;
706 pinctrl-names = "default";
707 pinctrl-0 = <&pinctrl_i2c7_default>;
711 i2c7: i2c-bus@300 {
712 #address-cells = <1>;
713 #size-cells = <0>;
714 #interrupt-cells = <1>;
717 compatible = "aspeed,ast2500-i2c-bus";
718 clocks = <&syscon ASPEED_CLK_APB>;
719 resets = <&syscon ASPEED_RESET_I2C>;
720 bus-frequency = <100000>;
722 interrupt-parent = <&i2c_ic>;
723 pinctrl-names = "default";
724 pinctrl-0 = <&pinctrl_i2c8_default>;
728 i2c8: i2c-bus@340 {
729 #address-cells = <1>;
730 #size-cells = <0>;
731 #interrupt-cells = <1>;
734 compatible = "aspeed,ast2500-i2c-bus";
735 clocks = <&syscon ASPEED_CLK_APB>;
736 resets = <&syscon ASPEED_RESET_I2C>;
737 bus-frequency = <100000>;
739 interrupt-parent = <&i2c_ic>;
740 pinctrl-names = "default";
741 pinctrl-0 = <&pinctrl_i2c9_default>;
745 i2c9: i2c-bus@380 {
746 #address-cells = <1>;
747 #size-cells = <0>;
748 #interrupt-cells = <1>;
751 compatible = "aspeed,ast2500-i2c-bus";
752 clocks = <&syscon ASPEED_CLK_APB>;
753 resets = <&syscon ASPEED_RESET_I2C>;
754 bus-frequency = <100000>;
756 interrupt-parent = <&i2c_ic>;
757 pinctrl-names = "default";
758 pinctrl-0 = <&pinctrl_i2c10_default>;
762 i2c10: i2c-bus@3c0 {
763 #address-cells = <1>;
764 #size-cells = <0>;
765 #interrupt-cells = <1>;
768 compatible = "aspeed,ast2500-i2c-bus";
769 clocks = <&syscon ASPEED_CLK_APB>;
770 resets = <&syscon ASPEED_RESET_I2C>;
771 bus-frequency = <100000>;
773 interrupt-parent = <&i2c_ic>;
774 pinctrl-names = "default";
775 pinctrl-0 = <&pinctrl_i2c11_default>;
779 i2c11: i2c-bus@400 {
780 #address-cells = <1>;
781 #size-cells = <0>;
782 #interrupt-cells = <1>;
785 compatible = "aspeed,ast2500-i2c-bus";
786 clocks = <&syscon ASPEED_CLK_APB>;
787 resets = <&syscon ASPEED_RESET_I2C>;
788 bus-frequency = <100000>;
790 interrupt-parent = <&i2c_ic>;
791 pinctrl-names = "default";
792 pinctrl-0 = <&pinctrl_i2c12_default>;
796 i2c12: i2c-bus@440 {
797 #address-cells = <1>;
798 #size-cells = <0>;
799 #interrupt-cells = <1>;
802 compatible = "aspeed,ast2500-i2c-bus";
803 clocks = <&syscon ASPEED_CLK_APB>;
804 resets = <&syscon ASPEED_RESET_I2C>;
805 bus-frequency = <100000>;
807 interrupt-parent = <&i2c_ic>;
808 pinctrl-names = "default";
809 pinctrl-0 = <&pinctrl_i2c13_default>;
813 i2c13: i2c-bus@480 {
814 #address-cells = <1>;
815 #size-cells = <0>;
816 #interrupt-cells = <1>;
819 compatible = "aspeed,ast2500-i2c-bus";
820 clocks = <&syscon ASPEED_CLK_APB>;
821 resets = <&syscon ASPEED_RESET_I2C>;
822 bus-frequency = <100000>;
824 interrupt-parent = <&i2c_ic>;
825 pinctrl-names = "default";
826 pinctrl-0 = <&pinctrl_i2c14_default>;