Lines Matching +full:0 +full:x39
64 reg = <0x80000000 0x20000000>;
74 reg = <0x98000000 0x04000000>; /* 64M */
78 size = <0x01000000>;
79 alignment = <0x01000000>;
85 size = <0x02000000>;
86 alignment = <0x01000000>;
115 gpios = <&gpio ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
116 linux,code = <ASPEED_GPIO(Z, 0)>;
173 gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_LOW>;
192 gpios = <&pca9552 0 GPIO_ACTIVE_LOW>;
229 #size-cells = <0>;
235 enable-gpios = <&gpio ASPEED_GPIO(D, 0) GPIO_ACTIVE_HIGH>;
240 io-channels = <&adc 0>;
322 pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
326 fan@0 {
327 reg = <0x00>;
328 aspeed,fan-tach-ch = /bits/ 8 <0x00>;
332 reg = <0x01>;
333 aspeed,fan-tach-ch = /bits/ 8 <0x01>;
337 reg = <0x02>;
338 aspeed,fan-tach-ch = /bits/ 8 <0x02>;
342 reg = <0x03>;
343 aspeed,fan-tach-ch = /bits/ 8 <0x03>;
347 reg = <0x04>;
348 aspeed,fan-tach-ch = /bits/ 8 <0x04>;
352 reg = <0x05>;
353 aspeed,fan-tach-ch = /bits/ 8 <0x05>;
357 reg = <0x00>;
358 aspeed,fan-tach-ch = /bits/ 8 <0x06>;
362 reg = <0x01>;
363 aspeed,fan-tach-ch = /bits/ 8 <0x07>;
367 reg = <0x02>;
368 aspeed,fan-tach-ch = /bits/ 8 <0x08>;
372 reg = <0x03>;
373 aspeed,fan-tach-ch = /bits/ 8 <0x09>;
377 reg = <0x04>;
378 aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
382 reg = <0x05>;
383 aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
422 flash@0 {
431 u-boot@0 {
432 reg = < 0 0x60000 >;
436 reg = < 0x60000 0x20000 >;
440 reg = < 0x80000 0x1F80000 >;
454 u-boot@0 {
455 reg = < 0 0x60000 >;
459 reg = < 0x60000 0x20000 >;
463 reg = < 0x80000 0x1F80000 >;
473 pinctrl-0 = <&pinctrl_spi1_default>;
475 flash@0 {
494 pinctrl-0 = <&pinctrl_txd1_default
509 pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
520 pinctrl-0 = <&pinctrl_rmii1_default>;
531 pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
560 * Power Supply 0
567 reg = <0x58>;
572 reg = <0x5b>;
577 reg = <0x60>;
579 #size-cells = <0>;
583 gpio@0 {
584 reg = <0>;
662 reg = <0x70>;
667 reg = <0x72>;
682 reg = <0x70>;
687 reg = <0x72>;
700 #size-cells = <0>;
701 reg = <0x70>;
703 bus7_mux223: i2c@0 {
705 #size-cells = <0>;
706 reg = <0>;
711 #size-cells = <0>;
717 #size-cells = <0>;
723 #size-cells = <0>;
729 #size-cells = <0>;
735 #size-cells = <0>;
741 #size-cells = <0>;
747 #size-cells = <0>;
762 #size-cells = <0>;
763 reg = <0x70>;
765 bus6_mux215: i2c@0 {
767 #size-cells = <0>;
768 reg = <0>;
773 #size-cells = <0>;
779 #size-cells = <0>;
785 #size-cells = <0>;
791 #size-cells = <0>;
797 #size-cells = <0>;
803 #size-cells = <0>;
809 #size-cells = <0>;
821 reg = <0x50>;
846 #size-cells = <0>;
847 reg = <0x70>;
853 bus9_mux231: i2c@0 {
855 #size-cells = <0>;
856 reg = <0>;
860 reg = <0x39>;
874 reg = <0x4c>;
880 #size-cells = <0>;
885 reg = <0x39>;
899 reg = <0x4c>;
905 #size-cells = <0>;
911 #size-cells = <0>;
919 #size-cells = <0>;
920 reg = <0x71>;
926 bus9_mux235: i2c@0 {
928 #size-cells = <0>;
929 reg = <0>;
933 reg = <0x39>;
947 reg = <0x4c>;
953 #size-cells = <0>;
958 reg = <0x39>;
972 reg = <0x4c>;
978 #size-cells = <0>;
984 #size-cells = <0>;
1011 #size-cells = <0>;
1012 reg = <0x70>;
1018 bus10_mux239: i2c@0 {
1020 #size-cells = <0>;
1021 reg = <0>;
1025 reg = <0x39>;
1039 reg = <0x4c>;
1045 #size-cells = <0>;
1050 reg = <0x39>;
1064 reg = <0x4c>;
1070 #size-cells = <0>;
1076 #size-cells = <0>;
1084 #size-cells = <0>;
1085 reg = <0x71>;
1091 bus10_mux243: i2c@0 {
1093 #size-cells = <0>;
1094 reg = <0>;
1098 reg = <0x39>;
1112 reg = <0x4c>;
1118 #size-cells = <0>;
1123 reg = <0x39>;
1137 reg = <0x4c>;
1143 #size-cells = <0>;
1149 #size-cells = <0>;
1167 reg = <0x57>;
1172 reg = <0x32>;
1177 reg = <0x48>;
1182 reg = <0x49>;
1188 reg = <0x4c>;
1206 #size-cells = <0>;
1207 reg = <0x70>;
1212 bus12_mux247: i2c@0 {
1214 #size-cells = <0>;
1215 reg = <0>;
1219 reg = <0x50>;
1225 #size-cells = <0>;
1230 reg = <0x50>;
1236 #size-cells = <0>;
1241 reg = <0x50>;
1247 #size-cells = <0>;
1252 reg = <0x48>;
1271 #size-cells = <0>;
1272 reg = <0x70>;
1273 bus13_mux251: i2c@0 {
1275 #size-cells = <0>;
1276 reg = <0>;
1281 #size-cells = <0>;
1287 #size-cells = <0>;
1293 #size-cells = <0>;
1299 #size-cells = <0>;
1305 #size-cells = <0>;
1311 #size-cells = <0>;
1317 #size-cells = <0>;
1335 pinctrl-0 = <&pinctrl_adc0_default
1360 pinctrl-0 = <&pinctrl_wdtrst1_default>;