Lines Matching full:reg
157 reg = <0x80000000 0x40000000>;
168 reg = <0xb8000000 0x04000000>; /* 64M */
174 reg = <0xbc000000 0x200000>; /* 16 * (4 * 0x8000) */
186 reg = <0xbf000000 0x01000000>; /* 16M */
305 reg = <0x51>;
310 reg = <0x62>;
349 reg = <0x54>;
354 reg = <0x68>;
359 reg = <0x69>;
364 reg = <0x6b>;
369 reg = <0x6d>;
378 reg = <0x65>;
400 reg = <0x70>;
409 reg = <0>;
412 reg = <0x52>;
417 reg = <0x62>;
426 reg = <0>;
434 reg = <1>;
445 reg = <1>;
448 reg = <0x50>;
453 reg = <0x60>;
462 reg = <0>;
470 reg = <1>;
481 reg = <2>;
484 reg = <0x51>;
489 reg = <0x61>;
498 reg = <0>;
506 reg = <1>;
521 reg = <0x66>;
545 reg = <0x70>;
554 reg = <0>;
557 reg = <0x50>;
562 reg = <0x60>;
571 reg = <0>;
579 reg = <1>;
590 reg = <1>;
593 reg = <0x51>;
598 reg = <0x61>;
607 reg = <0>;
615 reg = <1>;
626 reg = <2>;
629 reg = <0x52>;
634 reg = <0x62>;
643 reg = <0>;
651 reg = <1>;
662 reg = <3>;
665 reg = <0x53>;
670 reg = <0x63>;
679 reg = <0>;
687 reg = <1>;
702 reg = <0x70>;
711 reg = <0>;
714 reg = <0x50>;
719 reg = <0x60>;
728 reg = <0>;
736 reg = <1>;
747 reg = <1>;
750 reg = <0x52>;
755 reg = <0x62>;
764 reg = <0>;
772 reg = <1>;
783 reg = <2>;
786 reg = <0x53>;
791 reg = <0x63>;
800 reg = <0>;
808 reg = <1>;
819 reg = <3>;
822 reg = <0x51>;
827 reg = <0x61>;
836 reg = <0>;
844 reg = <1>;
855 reg = <0x65>;
864 reg = <1>;
872 reg = <2>;
880 reg = <3>;
888 reg = <4>;
896 reg = <5>;
904 reg = <6>;
912 reg = <7>;
920 reg = <8>;
928 reg = <9>;
936 reg = <10>;
944 reg = <11>;
957 reg = <0x31>;
966 reg = <0>;
974 reg = <1>;
982 reg = <2>;
990 reg = <3>;
998 reg = <4>;
1006 reg = <5>;
1014 reg = <6>;
1022 reg = <7>;
1030 reg = <8>;
1038 reg = <9>;
1046 reg = <10>;
1054 reg = <11>;
1062 reg = <12>;
1070 reg = <13>;
1078 reg = <14>;
1086 reg = <15>;
1095 reg = <0x32>;
1104 reg = <0>;
1112 reg = <1>;
1120 reg = <2>;
1128 reg = <3>;
1136 reg = <4>;
1144 reg = <5>;
1152 reg = <6>;
1160 reg = <7>;
1168 reg = <8>;
1176 reg = <9>;
1184 reg = <10>;
1192 reg = <11>;
1200 reg = <12>;
1208 reg = <13>;
1216 reg = <14>;
1224 reg = <15>;
1233 reg = <0x33>;
1242 reg = <0>;
1250 reg = <1>;
1258 reg = <2>;
1266 reg = <3>;
1274 reg = <4>;
1282 reg = <5>;
1290 reg = <6>;
1298 reg = <7>;
1306 reg = <8>;
1314 reg = <9>;
1322 reg = <10>;
1330 reg = <11>;
1338 reg = <12>;
1346 reg = <13>;
1354 reg = <14>;
1362 reg = <15>;
1371 reg = <0x30>;
1380 reg = <0>;
1388 reg = <1>;
1396 reg = <2>;
1404 reg = <3>;
1412 reg = <4>;
1420 reg = <5>;
1428 reg = <6>;
1436 reg = <7>;
1444 reg = <8>;
1452 reg = <9>;
1460 reg = <10>;
1468 reg = <11>;
1476 reg = <12>;
1484 reg = <13>;
1492 reg = <14>;
1500 reg = <15>;
1509 reg = <0x34>;
1518 reg = <0>;
1526 reg = <1>;
1534 reg = <2>;
1542 reg = <3>;
1550 reg = <4>;
1558 reg = <5>;
1566 reg = <6>;
1574 reg = <8>;
1582 reg = <9>;
1590 reg = <10>;
1598 reg = <11>;
1606 reg = <12>;
1614 reg = <13>;
1622 reg = <14>;
1630 reg = <15>;
1639 reg = <0x35>;
1648 reg = <0>;
1656 reg = <1>;
1664 reg = <2>;
1672 reg = <3>;
1680 reg = <4>;
1688 reg = <5>;
1696 reg = <6>;
1704 reg = <8>;
1712 reg = <9>;
1720 reg = <10>;
1728 reg = <11>;
1736 reg = <12>;
1744 reg = <13>;
1752 reg = <14>;
1760 reg = <15>;
1773 reg = <0x11>;
1778 reg = <0x32>;
1783 reg = <0x51>;
1788 reg = <0x50>;
1793 reg = <0x70>;
1802 reg = <0>;
1808 reg = <1>;
1818 reg = <0x50>;
1823 reg = <0x51>;
1828 reg = <0x53>;
1833 reg = <0x52>;
1842 reg = <0x51>;
1847 reg = <0x50>;
1852 reg = <0x53>;
1857 reg = <0x52>;
1866 reg = <0x51>;
1871 reg = <0x50>;
1876 reg = <0x53>;
1881 reg = <0x52>;
1890 reg = <0x2e>;
1899 reg = <0x51>;
1904 reg = <0x50>;
1909 reg = <0x53>;
1914 reg = <0x52>;
1924 reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>;
1929 reg = <0x70>;
1938 reg = <0>;
1941 reg = <0x50>;
1948 reg = <1>;
1951 reg = <0x51>;
1958 reg = <2>;
1961 reg = <0x50>;
1966 reg = <0x60>;
1975 reg = <0>;
1983 reg = <1>;
1991 reg = <2>;
1999 reg = <3>;
2010 reg = <3>;
2016 reg = <0x52>;
2020 reg = <0>;
2026 reg = <1>;
2032 reg = <2>;
2038 reg = <3>;
2045 reg = <0x60>;
2054 reg = <0>;
2062 reg = <1>;
2070 reg = <2>;
2078 reg = <3>;
2086 reg = <4>;
2094 reg = <5>;
2102 reg = <6>;
2110 reg = <7>;
2118 reg = <8>;
2126 reg = <9>;
2134 reg = <10>;
2142 reg = <11>;
2150 reg = <12>;
2158 reg = <13>;
2169 reg = <0x61>;
2188 reg = <0x71>;
2197 reg = <0>;
2200 reg = <0x50>;
2207 reg = <1>;
2210 reg = <0x50>;
2217 reg = <2>;
2220 reg = <0x50>;
2227 reg = <3>;
2230 reg = <0x50>;
2241 reg = <0x70>;
2249 reg = <0>;
2253 reg = <0x53>;
2260 reg = <1>;
2264 reg = <0x53>;
2271 reg = <2>;
2275 reg = <0x53>;
2282 reg = <3>;
2286 reg = <0x53>;
2293 reg = <0x71>;
2301 reg = <0>;
2305 reg = <0x53>;
2312 reg = <1>;
2316 reg = <0x53>;
2323 reg = <2>;
2327 reg = <0x53>;
2334 reg = <3>;
2338 reg = <0x53>;
2345 reg = <0x72>;
2353 reg = <0>;
2357 reg = <0x53>;
2364 reg = <1>;
2368 reg = <0x53>;
2375 reg = <2>;
2381 reg = <3>;
2424 reg = <0 0>;
2431 reg = <0x1000 0x400>;
2436 reg = <0x1800 0x400>;
2441 reg = <0>; /* OMI01 */
2445 reg = <1>; /* OMI23 */
2449 reg = <10>; /* OP3A */
2453 reg = <11>; /* OP3B */
2457 reg = <12>; /* OP4A */
2461 reg = <13>; /* OP4B */
2465 reg = <14>; /* OP5A */
2469 reg = <15>; /* OP5B */
2475 reg = <0x1c00 0x400>;
2480 reg = <0x0>;
2490 reg = <0>;
2496 reg = <0x20>;
2506 reg = <0>;
2512 reg = <0x40>;
2523 reg = <0>;
2529 reg = <0x60>;
2540 reg = <0>;
2548 reg = <0x2400 0x400>;
2559 reg = <0x3400 0x400>;
2568 reg = <1 0>;
2575 reg = <0x1000 0x400>;
2580 reg = <0x1800 0x400>;
2585 reg = <2>; /* OMI45 */
2589 reg = <3>; /* OMI67 */
2593 reg = <10>; /* OP3A */
2597 reg = <11>; /* OP3B */
2601 reg = <14>; /* OP5A */
2605 reg = <15>; /* OP5B */
2609 reg = <16>; /* OP6A */
2613 reg = <17>; /* OP6B */
2619 reg = <0x1c00 0x400>;
2624 reg = <0x0>;
2634 reg = <0>;
2640 reg = <0x20>;
2650 reg = <0>;
2656 reg = <0x40>;
2667 reg = <0>;
2673 reg = <0x60>;
2684 reg = <0>;
2692 reg = <0x2400 0x400>;
2703 reg = <0x3400 0x400>;
2712 reg = <2 0>;
2719 reg = <0x1000 0x400>;
2724 reg = <0x1800 0x400>;
2729 reg = <0>; /* OM01 */
2733 reg = <1>; /* OM23 */
2737 reg = <10>; /* OP3A */
2741 reg = <11>; /* OP3B */
2745 reg = <12>; /* OP4A */
2749 reg = <13>; /* OP4B */
2753 reg = <14>; /* OP5A */
2757 reg = <15>; /* OP5B */
2763 reg = <0x1c00 0x400>;
2768 reg = <0x0>;
2778 reg = <0>;
2784 reg = <0x20>;
2794 reg = <0>;
2800 reg = <0x40>;
2811 reg = <0>;
2817 reg = <0x60>;
2828 reg = <0>;
2836 reg = <0x2400 0x400>;
2847 reg = <0x3400 0x400>;
2856 reg = <3 0>;
2863 reg = <0x1000 0x400>;
2868 reg = <0x1800 0x400>;
2873 reg = <2>; /* OM45 */
2877 reg = <3>; /* OM67 */
2881 reg = <10>; /* OP3A */
2885 reg = <11>; /* OP3B */
2889 reg = <14>; /* OP5A */
2893 reg = <15>; /* OP5B */
2897 reg = <16>; /* OP6A */
2901 reg = <17>; /* OP6B */
2907 reg = <0x1c00 0x400>;
2912 reg = <0x0>;
2922 reg = <0>;
2928 reg = <0x20>;
2938 reg = <0>;
2944 reg = <0x40>;
2955 reg = <0>;
2961 reg = <0x60>;
2972 reg = <0>;
2980 reg = <0x2400 0x400>;
2991 reg = <0x3400 0x400>;
3000 reg = <4 0>;
3007 reg = <0x1000 0x400>;
3012 reg = <0x1800 0x400>;
3017 reg = <0>; /* OM01 */
3021 reg = <1>; /* OM23 */
3025 reg = <10>; /* OP3A */
3029 reg = <11>; /* OP3B */
3033 reg = <12>; /* OP4A */
3037 reg = <13>; /* OP4B */
3041 reg = <14>; /* OP5A */
3045 reg = <15>; /* OP5B */
3051 reg = <0x1c00 0x400>;
3056 reg = <0x0>;
3066 reg = <0>;
3072 reg = <0x20>;
3082 reg = <0>;
3088 reg = <0x40>;
3099 reg = <0>;
3105 reg = <0x60>;
3116 reg = <0>;
3124 reg = <0x2400 0x400>;
3135 reg = <0x3400 0x400>;
3144 reg = <5 0>;
3151 reg = <0x1000 0x400>;
3156 reg = <0x1800 0x400>;
3161 reg = <2>; /* OM45 */
3165 reg = <3>; /* OM67 */
3169 reg = <10>; /* OP3A */
3173 reg = <11>; /* OP3B */
3177 reg = <14>; /* OP5A */
3181 reg = <15>; /* OP5B */
3185 reg = <16>; /* OP6A */
3189 reg = <17>; /* OP6B */
3195 reg = <0x1c00 0x400>;
3200 reg = <0x0>;
3210 reg = <0>;
3216 reg = <0x20>;
3226 reg = <0>;
3232 reg = <0x40>;
3243 reg = <0>;
3249 reg = <0x60>;
3260 reg = <0>;
3268 reg = <0x2400 0x400>;
3279 reg = <0x3400 0x400>;
3288 reg = <6 0>;
3295 reg = <0x1000 0x400>;
3300 reg = <0x1800 0x400>;
3305 reg = <0>; /* OM01 */
3309 reg = <1>; /* OM23 */
3313 reg = <10>; /* OP3A */
3317 reg = <11>; /* OP3B */
3321 reg = <12>; /* OP4A */
3325 reg = <13>; /* OP4B */
3329 reg = <14>; /* OP5A */
3333 reg = <15>; /* OP5B */
3339 reg = <0x1c00 0x400>;
3344 reg = <0x0>;
3354 reg = <0>;
3360 reg = <0x20>;
3370 reg = <0>;
3376 reg = <0x40>;
3387 reg = <0>;
3393 reg = <0x60>;
3404 reg = <0>;
3412 reg = <0x2400 0x400>;
3423 reg = <0x3400 0x400>;
3432 reg = <7 0>;
3439 reg = <0x1000 0x400>;
3444 reg = <0x1800 0x400>;
3449 reg = <2>; /* OM45 */
3453 reg = <3>; /* OM67 */
3457 reg = <10>; /* OP3A */
3461 reg = <11>; /* OP3B */
3465 reg = <14>; /* OP5A */
3469 reg = <15>; /* OP5B */
3473 reg = <16>; /* OP6A */
3477 reg = <17>; /* OP6B */
3483 reg = <0x1c00 0x400>;
3488 reg = <0x0>;
3498 reg = <0>;
3504 reg = <0x20>;
3514 reg = <0>;
3520 reg = <0x40>;
3531 reg = <0>;
3537 reg = <0x60>;
3548 reg = <0>;
3556 reg = <0x2400 0x400>;
3567 reg = <0x3400 0x400>;
3578 reg = <1>;
3582 reg = <2>;
3586 reg = <3>;
3590 reg = <4>;
3594 reg = <5>;
3598 reg = <6>;
3602 reg = <7>;
3606 reg = <8>;
3667 aspeed,lpc-io-reg = <0xca8 0xcac>;
3672 aspeed,lpc-io-reg = <0xca2>;