Lines Matching +full:io +full:- +full:channels
1 // SPDX-License-Identifier: GPL-2.0-only
4 /dts-v1/;
6 #include "aspeed-g6.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
11 compatible = "ampere,mtmitchell-bmc", "aspeed,ast2600";
14 stdout-path = &uart5;
22 reserved-memory {
23 #address-cells = <1>;
24 #size-cells = <1>;
30 compatible = "shared-dma-pool";
37 compatible = "shared-dma-pool";
42 no-map;
43 compatible = "shared-dma-pool";
48 voltage_mon_reg: voltage-mon-regulator {
49 compatible = "regulator-fixed";
50 regulator-name = "ltc2497_reg";
51 regulator-min-microvolt = <3300000>;
52 regulator-max-microvolt = <3300000>;
53 regulator-always-on;
56 gpioI5mux: mux-controller {
57 compatible = "gpio-mux";
58 #mux-control-cells = <0>;
59 mux-gpios = <&gpio0 ASPEED_GPIO(I, 5) GPIO_ACTIVE_HIGH>;
63 compatible = "io-channel-mux";
64 io-channels = <&adc0 0>;
65 #io-channel-cells = <1>;
66 io-channel-names = "parent";
67 mux-controls = <&gpioI5mux>;
68 channels = "s0", "s1";
72 compatible = "io-channel-mux";
73 io-channels = <&adc0 1>;
74 #io-channel-cells = <1>;
75 io-channel-names = "parent";
76 mux-controls = <&gpioI5mux>;
77 channels = "s0", "s1";
81 compatible = "io-channel-mux";
82 io-channels = <&adc0 2>;
83 #io-channel-cells = <1>;
84 io-channel-names = "parent";
85 mux-controls = <&gpioI5mux>;
86 channels = "s0", "s1";
90 compatible = "io-channel-mux";
91 io-channels = <&adc0 3>;
92 #io-channel-cells = <1>;
93 io-channel-names = "parent";
94 mux-controls = <&gpioI5mux>;
95 channels = "s0", "s1";
99 compatible = "io-channel-mux";
100 io-channels = <&adc0 4>;
101 #io-channel-cells = <1>;
102 io-channel-names = "parent";
103 mux-controls = <&gpioI5mux>;
104 channels = "s0", "s1";
108 compatible = "io-channel-mux";
109 io-channels = <&adc0 5>;
110 #io-channel-cells = <1>;
111 io-channel-names = "parent";
112 mux-controls = <&gpioI5mux>;
113 channels = "s0", "s1";
117 compatible = "io-channel-mux";
118 io-channels = <&adc0 6>;
119 #io-channel-cells = <1>;
120 io-channel-names = "parent";
121 mux-controls = <&gpioI5mux>;
122 channels = "s0", "s1";
126 compatible = "io-channel-mux";
127 io-channels = <&adc0 7>;
128 #io-channel-cells = <1>;
129 io-channel-names = "parent";
130 mux-controls = <&gpioI5mux>;
131 channels = "s0", "s1";
135 compatible = "io-channel-mux";
136 io-channels = <&adc1 0>;
137 #io-channel-cells = <1>;
138 io-channel-names = "parent";
139 mux-controls = <&gpioI5mux>;
140 channels = "s0", "s1";
144 compatible = "io-channel-mux";
145 io-channels = <&adc1 1>;
146 #io-channel-cells = <1>;
147 io-channel-names = "parent";
148 mux-controls = <&gpioI5mux>;
149 channels = "s0", "s1";
153 compatible = "io-channel-mux";
154 io-channels = <&adc1 2>;
155 #io-channel-cells = <1>;
156 io-channel-names = "parent";
157 mux-controls = <&gpioI5mux>;
158 channels = "s0", "s1";
162 compatible = "io-channel-mux";
163 io-channels = <&adc1 3>;
164 #io-channel-cells = <1>;
165 io-channel-names = "parent";
166 mux-controls = <&gpioI5mux>;
167 channels = "s0", "s1";
171 compatible = "io-channel-mux";
172 io-channels = <&adc1 4>;
173 #io-channel-cells = <1>;
174 io-channel-names = "parent";
175 mux-controls = <&gpioI5mux>;
176 channels = "s0", "s1";
180 compatible = "io-channel-mux";
181 io-channels = <&adc1 5>;
182 #io-channel-cells = <1>;
183 io-channel-names = "parent";
184 mux-controls = <&gpioI5mux>;
185 channels = "s0", "s1";
189 compatible = "io-channel-mux";
190 io-channels = <&adc1 6>;
191 #io-channel-cells = <1>;
192 io-channel-names = "parent";
193 mux-controls = <&gpioI5mux>;
194 channels = "s0", "s1";
198 compatible = "io-channel-mux";
199 io-channels = <&adc1 7>;
200 #io-channel-cells = <1>;
201 io-channel-names = "parent";
202 mux-controls = <&gpioI5mux>;
203 channels = "s0", "s1";
206 iio-hwmon {
207 compatible = "iio-hwmon";
208 io-channels = <&adc0mux 0>, <&adc0mux 1>,
238 ethphy0: ethernet-phy@0 {
239 compatible = "ethernet-phy-ieee802.3-c22";
247 phy-mode = "rgmii";
248 phy-handle = <ðphy0>;
250 pinctrl-names = "default";
251 pinctrl-0 = <&pinctrl_rgmii1_default>;
258 m25p,fast-read;
260 spi-max-frequency = <50000000>;
261 #include "openbmc-flash-layout-64.dtsi"
266 m25p,fast-read;
267 label = "alt-bmc";
268 spi-max-frequency = <50000000>;
269 #include "openbmc-flash-layout-64-alt.dtsi"
275 pinctrl-names = "default";
276 pinctrl-0 = <&pinctrl_spi1_default>;
280 m25p,fast-read;
282 spi-max-frequency = <20000000>;
305 temperature-sensor@2e {
339 vref-supply = <&voltage_mon_reg>;
340 #io-channel-cells = <1>;
349 i2c-mux@70 {
351 #address-cells = <1>;
352 #size-cells = <0>;
354 i2c-mux-idle-disconnect;
357 #address-cells = <1>;
358 #size-cells = <0>;
361 outlet_temp1: temperature-sensor@48 {
365 psu1_inlet_temp2: temperature-sensor@49 {
372 #address-cells = <1>;
373 #size-cells = <0>;
376 pcie_zone_temp1: temperature-sensor@48 {
380 psu0_inlet_temp2: temperature-sensor@49 {
387 #address-cells = <1>;
388 #size-cells = <0>;
391 pcie_zone_temp2: temperature-sensor@48 {
395 outlet_temp2: temperature-sensor@49 {
402 #address-cells = <1>;
403 #size-cells = <0>;
406 mb_inlet_temp1: temperature-sensor@7c {
410 mb_inlet_temp2: temperature-sensor@4c {
421 i2c-mux@70 {
423 #address-cells = <1>;
424 #size-cells = <0>;
426 i2c-mux-idle-disconnect;
458 bmc_ast2600_cpu: temperature-sensor@35 {
468 pinctrl-names = "default";
469 pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
479 pinctrl-names = "default";
480 pinctrl-0 = <&pinctrl_adc8_default &pinctrl_adc9_default
492 memory-region = <&video_engine_memory>;
496 gpio-line-names =
497 /*A0-A7*/ "","","","","","i2c2-reset-n","i2c6-reset-n","i2c4-reset-n",
498 /*B0-B7*/ "","","","","host0-sysreset-n","host0-pmin-n","","",
499 /*C0-C7*/ "s0-vrd-fault-n","s1-vrd-fault-n","","",
500 "irq-n","","vrd-sel","spd-sel",
501 /*D0-D7*/ "presence-ps0","presence-ps1","hsc-12vmain-alt2-n","ext-high-temp-n",
502 "","bmc-ncsi-txen","","",
503 /*E0-E7*/ "","","clk50m-bmc-ncsi","","","","","",
504 /*F0-F7*/ "s0-pcp-oc-warn-n","s1-pcp-oc-warn-n","power-chassis-control",
505 "cpu-bios-recover","s0-heartbeat","hs-csout-prochot",
506 "s0-vr-hot-n","s1-vr-hot-n",
507 /*G0-G7*/ "","","hsc-12vmain-alt1-n","","","","","",
508 /*H0-H7*/ "","","wd-disable-n","power-chassis-good","","","","",
509 /*I0-I7*/ "","","","","","adc-sw","power-button","rtc-battery-voltage-read-enable",
510 /*J0-J7*/ "","","","","","","","",
511 /*K0-K7*/ "","","","","","","","",
512 /*L0-L7*/ "","","","","","","","",
513 /*M0-M7*/ "","s0-ddr-save","soc-spi-nor-access","presence-cpu0",
514 "s0-rtc-lock","","","",
515 /*N0-N7*/ "hpm-fw-recovery","hpm-stby-rst-n","jtag-sel-s0","led-sw-hb",
516 "jtag-dbgr-prsnt-n","s1-heartbeat","","",
517 /*O0-O7*/ "","","","","","","","",
518 /*P0-P7*/ "ps0-ac-loss-n","ps1-ac-loss-n","","",
519 "led-fault","cpld-user-mode","jtag-srst-n","led-bmc-hb",
520 /*Q0-Q7*/ "","","","","","","","",
521 /*R0-R7*/ "","","","","","","","",
522 /*S0-S7*/ "","","identify-button","led-identify",
523 "s1-ddr-save","spi-nor-access","sys-pgood","presence-cpu1",
524 /*T0-T7*/ "","","","","","","","",
525 /*U0-U7*/ "","","","","","","","",
526 /*V0-V7*/ "s0-hightemp-n","s0-fault-alert","s0-sys-auth-failure-n",
527 "host0-reboot-ack-n","host0-ready","host0-shd-req-n",
528 "host0-shd-ack-n","s0-overtemp-n",
529 /*W0-W7*/ "ocp-aux-pwren","ocp-main-pwren","ocp-pgood","",
530 "bmc-ok","bmc-ready","spi0-program-sel","spi0-backup-sel",
531 /*X0-X7*/ "i2c-backup-sel","s1-fault-alert","s1-fw-boot-ok",
532 "s1-hightemp-n","s0-spi-auth-fail-n","s1-sys-auth-failure-n",
533 "s1-overtemp-n","s1-spi-auth-fail-n",
534 /*Y0-Y7*/ "","","","","","","","host0-special-boot",
535 /*Z0-Z7*/ "reset-button","ps0-pgood","ps1-pgood","","","","","";
539 gpio-line-names =
540 /*18A0-18A7*/ "","","","","","","","",
541 /*18B0-18B7*/ "","","","","","","s0-soc-pgood","",
542 /*18C0-18C7*/ "uart1-mode0","uart1-mode1","uart2-mode0","uart2-mode1",
543 "uart3-mode0","uart3-mode1","uart4-mode0","uart4-mode1",
544 /*18D0-18D7*/ "","","","","","","","",
545 /*18E0-18E3*/ "","","","";