Lines Matching +full:spi1 +full:- +full:default +full:- +full:pins

1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include "armada-388-clearfog.dtsi"
13 	compatible = "solidrun,clearfog-a1", "marvell,armada388",
17 		internal-regs {
27 				reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
33 	gpio-keys {
34 		compatible = "gpio-keys";
35 		pinctrl-0 = <&rear_button_pins>;
36 		pinctrl-names = "default";
38 		button-0 {
42 			linux,can-disable;
50 	fixed-link {
52 		full-duplex;
59 	 *  0-CON3 CLKREQ#
60 	 *  1-CON3 PERST#
61 	 *  2-CON2 PERST#
62 	 *  3-CON3 W_DISABLE
63 	 *  4-CON2 CLKREQ#
64 	 *  5-USB3 overcurrent
65 	 *  6-USB3 power
66 	 *  7-CON2 W_DISABLE
67 	 *  8-JP4 P1
68 	 *  9-JP4 P4
69 	 * 10-JP4 P5
70 	 * 11-m.2 DEVSLP
71 	 * 12-SFP_LOS
72 	 * 13-SFP_TX_FAULT
73 	 * 14-SFP_TX_DISABLE
74 	 * 15-SFP_MOD_DEF0
76 	pcie2-0-clkreq-hog {
77 		gpio-hog;
80 		line-name = "pcie2.0-clkreq";
82 	pcie2-0-w-disable-hog {
83 		gpio-hog;
85 		output-low;
86 		line-name = "pcie2.0-w-disable";
95 		#address-cells = <1>;
96 		#size-cells = <0>;
98 		pinctrl-0 = <&clearfog_dsa0_clk_pins &clearfog_dsa0_pins>;
99 		pinctrl-names = "default";
102 			#address-cells = <1>;
103 			#size-cells = <0>;
134 				fixed-link {
136 					full-duplex;
144 				fixed-link {
146 					full-duplex;
154 	clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
155 		marvell,pins = "mpp46";
158 	clearfog_dsa0_pins: clearfog-dsa0-pins {
159 		marvell,pins = "mpp23", "mpp41";
162 	clearfog_spi1_cs_pins: spi1-cs-pins {
163 		marvell,pins = "mpp55";
164 		marvell,function = "spi1";
166 	rear_button_pins: rear-button-pins {
167 		marvell,pins = "mpp34";
172 &spi1 {
174 	 * Add SPI CS pins for clearfog:
179 	pinctrl-0 = <&spi1_pins &clearfog_spi1_cs_pins &mikro_spi_pins>;