Lines Matching +full:interrupt +full:- +full:parent
23 /dts-v1/;
24 #include "arm-realview-pbx.dtsi"
28 * This is the RealView Platform Baseboard Explore for Cortex-A9
31 model = "ARM RealView Platform Baseboard Explore for Cortex-A9";
35 #address-cells = <1>;
36 #size-cells = <0>;
37 enable-method = "arm,realview-smp";
39 cpu-map {
51 compatible = "arm,cortex-a9";
53 next-level-cache = <&L2>;
57 compatible = "arm,cortex-a9";
59 next-level-cache = <&L2>;
63 L2: cache-controller {
64 compatible = "arm,pl310-cache";
66 cache-unified;
67 cache-level = <2>;
73 cache-size = <131072>; // 128KB
74 cache-sets = <512>;
75 cache-line-size = <32>;
76 arm,parity-disable;
77 arm,tag-latency = <1 1 1>;
78 arm,data-latency = <1 1 1>;
82 compatible = "arm,cortex-a9-scu";
87 compatible = "arm,cortex-a9-twd-timer";
89 interrupt-parent = <&intc>;
94 compatible = "arm,cortex-a9-twd-wdt";
96 interrupt-parent = <&intc>;
101 compatible = "arm,cortex-a9-pmu";
102 interrupt-parent = <&intc>;
105 interrupt-affinity = <&CPU0>, <&CPU1>;
108 /* Primary GIC PL390 interrupt controller in the test chip */
109 intc: interrupt-controller@1f000000 {
110 compatible = "arm,cortex-a9-gic";
111 #interrupt-cells = <3>;
112 #address-cells = <1>;
113 interrupt-controller;
120 interrupt-parent = <&intc>;
125 interrupt-parent = <&intc>;
130 interrupt-parent = <&intc>;
135 interrupt-parent = <&intc>;
140 interrupt-parent = <&intc>;
145 interrupt-parent = <&intc>;
150 interrupt-parent = <&intc>;
155 interrupt-parent = <&intc>;
160 interrupt-parent = <&intc>;
165 interrupt-parent = <&intc>;
170 interrupt-parent = <&intc>;
175 interrupt-parent = <&intc>;
180 interrupt-parent = <&intc>;
185 interrupt-parent = <&intc>;
190 interrupt-parent = <&intc>;
195 interrupt-parent = <&intc>;
200 interrupt-parent = <&intc>;
205 interrupt-parent = <&intc>;
210 interrupt-parent = <&intc>;
216 interrupt-parent = <&intc>;
221 interrupt-parent = <&intc>;
226 interrupt-parent = <&intc>;