Lines Matching +full:fw +full:- +full:cfg +full:- +full:mmio
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/am4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
17 #size-cells = <1>;
41 #address-cells = <1>;
42 #size-cells = <0>;
44 compatible = "arm,cortex-a9";
45 enable-method = "ti,am4372";
50 clock-names = "cpu";
52 operating-points-v2 = <&cpu0_opp_table>;
54 clock-latency = <300000>; /* From omap-cpufreq driver */
55 cpu-idle-states = <&mpu_gate>;
58 idle-states {
60 compatible = "arm,idle-state";
61 entry-latency-us = <40>;
62 exit-latency-us = <100>;
63 min-residency-us = <300>;
64 local-timer-stop;
69 cpu0_opp_table: opp-table {
70 compatible = "operating-points-v2-ti-cpu";
73 opp50-300000000 {
74 opp-hz = /bits/ 64 <300000000>;
75 opp-microvolt = <950000 931000 969000>;
76 opp-supported-hw = <0xFF 0x01>;
77 opp-suspend;
80 opp100-600000000 {
81 opp-hz = /bits/ 64 <600000000>;
82 opp-microvolt = <1100000 1078000 1122000>;
83 opp-supported-hw = <0xFF 0x04>;
86 opp120-720000000 {
87 opp-hz = /bits/ 64 <720000000>;
88 opp-microvolt = <1200000 1176000 1224000>;
89 opp-supported-hw = <0xFF 0x08>;
92 oppturbo-800000000 {
93 opp-hz = /bits/ 64 <800000000>;
94 opp-microvolt = <1260000 1234800 1285200>;
95 opp-supported-hw = <0xFF 0x10>;
98 oppnitro-1000000000 {
99 opp-hz = /bits/ 64 <1000000000>;
100 opp-microvolt = <1325000 1298500 1351500>;
101 opp-supported-hw = <0xFF 0x20>;
106 compatible = "ti,omap-infra";
109 gic: interrupt-controller@48241000 {
110 compatible = "arm,cortex-a9-gic";
111 interrupt-controller;
112 #interrupt-cells = <3>;
115 interrupt-parent = <&gic>;
118 wakeupgen: interrupt-controller@48281000 {
119 compatible = "ti,omap4-wugen-mpu";
120 interrupt-controller;
121 #interrupt-cells = <3>;
123 interrupt-parent = <&gic>;
127 compatible = "arm,cortex-a9-scu";
132 compatible = "arm,cortex-a9-global-timer";
135 interrupt-parent = <&gic>;
140 compatible = "arm,cortex-a9-twd-timer";
143 interrupt-parent = <&gic>;
147 cache-controller@48242000 {
148 compatible = "arm,pl310-cache";
150 cache-unified;
151 cache-level = <2>;
155 compatible = "simple-pm-bus";
156 power-domains = <&prm_per>;
158 clock-names = "fck";
159 #address-cells = <1>;
160 #size-cells = <1>;
162 ti,no-idle;
164 l3-noc@44000000 {
165 compatible = "ti,am4372-l3-noc";
179 target-module@4c000000 {
180 compatible = "ti,sysc-omap4-simple", "ti,sysc";
182 reg-names = "rev";
184 clock-names = "fck";
185 ti,no-idle;
186 #address-cells = <1>;
187 #size-cells = <1>;
191 compatible = "ti,emif-am4372";
199 target-module@49000000 {
200 compatible = "ti,sysc-omap4", "ti,sysc";
202 reg-names = "rev";
204 clock-names = "fck";
205 #address-cells = <1>;
206 #size-cells = <1>;
210 compatible = "ti,edma3-tpcc";
212 reg-names = "edma3_cc";
216 interrupt-names = "edma3_ccint", "edma3_mperr",
218 dma-requests = <64>;
219 #dma-cells = <2>;
224 ti,edma-memcpy-channels = <58 59>;
228 target-module@49800000 {
229 compatible = "ti,sysc-omap4", "ti,sysc";
232 reg-names = "rev", "sysc";
233 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
234 ti,sysc-midle = <SYSC_IDLE_FORCE>;
235 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
238 clock-names = "fck";
239 #address-cells = <1>;
240 #size-cells = <1>;
244 compatible = "ti,edma3-tptc";
247 interrupt-names = "edma3_tcerrint";
251 target-module@49900000 {
252 compatible = "ti,sysc-omap4", "ti,sysc";
255 reg-names = "rev", "sysc";
256 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
257 ti,sysc-midle = <SYSC_IDLE_FORCE>;
258 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
261 clock-names = "fck";
262 #address-cells = <1>;
263 #size-cells = <1>;
267 compatible = "ti,edma3-tptc";
270 interrupt-names = "edma3_tcerrint";
274 target-module@49a00000 {
275 compatible = "ti,sysc-omap4", "ti,sysc";
278 reg-names = "rev", "sysc";
279 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
280 ti,sysc-midle = <SYSC_IDLE_FORCE>;
281 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
284 clock-names = "fck";
285 #address-cells = <1>;
286 #size-cells = <1>;
290 compatible = "ti,edma3-tptc";
293 interrupt-names = "edma3_tcerrint";
297 target-module@47810000 {
298 compatible = "ti,sysc-omap2", "ti,sysc";
302 reg-names = "rev", "sysc", "syss";
303 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
307 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
310 ti,syss-mask = <1>;
312 clock-names = "fck";
313 #address-cells = <1>;
314 #size-cells = <1>;
318 compatible = "ti,am437-sdhci";
319 ti,needs-special-reset;
326 sham_target: target-module@53100000 {
327 compatible = "ti,sysc-omap3-sham", "ti,sysc";
331 reg-names = "rev", "sysc", "syss";
332 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
334 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
337 ti,syss-mask = <1>;
340 clock-names = "fck";
341 #address-cells = <1>;
342 #size-cells = <1>;
346 compatible = "ti,omap5-sham";
349 dma-names = "rx";
354 aes_target: target-module@53501000 {
355 compatible = "ti,sysc-omap2", "ti,sysc";
359 reg-names = "rev", "sysc", "syss";
360 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
362 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
366 ti,syss-mask = <1>;
369 clock-names = "fck";
370 #address-cells = <1>;
371 #size-cells = <1>;
375 compatible = "ti,omap4-aes";
380 dma-names = "tx", "rx";
384 des_target: target-module@53701000 {
385 compatible = "ti,sysc-omap2", "ti,sysc";
389 reg-names = "rev", "sysc", "syss";
390 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
392 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
396 ti,syss-mask = <1>;
399 clock-names = "fck";
400 #address-cells = <1>;
401 #size-cells = <1>;
405 compatible = "ti,omap4-des";
410 dma-names = "tx", "rx";
414 pruss_tm: target-module@54400000 {
415 compatible = "ti,sysc-pruss", "ti,sysc";
418 reg-names = "rev", "sysc";
419 ti,sysc-mask = <(SYSC_PRUSS_STANDBY_INIT |
421 ti,sysc-midle = <SYSC_IDLE_FORCE>,
424 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
428 clock-names = "fck";
430 reset-names = "rstctrl";
431 #address-cells = <1>;
432 #size-cells = <1>;
436 compatible = "ti,am4376-pruss1";
438 #address-cells = <1>;
439 #size-cells = <1>;
446 reg-names = "dram0", "dram1",
450 pruss1_cfg: cfg@26000 {
451 compatible = "ti,pruss-cfg", "syscon";
453 #address-cells = <1>;
454 #size-cells = <1>;
458 #address-cells = <1>;
459 #size-cells = <0>;
461 pruss1_iepclk_mux: iepclk-mux@30 {
463 #clock-cells = <0>;
470 pruss1_mii_rt: mii-rt@32000 {
471 compatible = "ti,pruss-mii", "syscon";
475 pruss1_intc: interrupt-controller@20000 {
476 compatible = "ti,pruss-intc";
478 interrupt-controller;
479 #interrupt-cells = <3>;
487 interrupt-names = "host_intr0", "host_intr1",
491 ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */
495 compatible = "ti,am4376-pru";
499 reg-names = "iram", "control", "debug";
500 firmware-name = "am437x-pru1_0-fw";
504 compatible = "ti,am4376-pru";
508 reg-names = "iram", "control", "debug";
509 firmware-name = "am437x-pru1_1-fw";
516 clock-names = "fck";
518 #address-cells = <1>;
519 #size-cells = <0>;
524 compatible = "ti,am4376-pruss0";
526 #address-cells = <1>;
527 #size-cells = <1>;
533 reg-names = "dram0", "dram1";
536 pruss0_cfg: cfg@66000 {
537 compatible = "ti,pruss-cfg", "syscon";
539 #address-cells = <1>;
540 #size-cells = <1>;
544 #address-cells = <1>;
545 #size-cells = <0>;
547 pruss0_iepclk_mux: iepclk-mux@30 {
549 #clock-cells = <0>;
556 pruss0_mii_rt: mii-rt@72000 {
557 compatible = "ti,pruss-mii", "syscon";
562 pruss0_intc: interrupt-controller@60000 {
563 compatible = "ti,pruss-intc";
565 interrupt-controller;
566 #interrupt-cells = <3>;
574 interrupt-names = "host_intr0", "host_intr1",
578 ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */
582 compatible = "ti,am4376-pru";
586 reg-names = "iram", "control", "debug";
587 firmware-name = "am437x-pru0_0-fw";
591 compatible = "ti,am4376-pru";
595 reg-names = "iram", "control", "debug";
596 firmware-name = "am437x-pru0_1-fw";
601 target-module@50000000 {
602 compatible = "ti,sysc-omap2", "ti,sysc";
606 reg-names = "rev", "sysc", "syss";
607 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
610 ti,syss-mask = <1>;
612 clock-names = "fck";
613 #address-cells = <1>;
614 #size-cells = <1>;
619 compatible = "ti,am3352-gpmc";
621 dma-names = "rxtx";
623 clock-names = "fck";
626 gpmc,num-cs = <7>;
627 gpmc,num-waitpins = <2>;
628 #address-cells = <2>;
629 #size-cells = <1>;
630 interrupt-controller;
631 #interrupt-cells = <2>;
632 gpio-controller;
633 #gpio-cells = <2>;
638 target-module@47900000 {
639 compatible = "ti,sysc-omap4", "ti,sysc";
642 reg-names = "rev", "sysc";
643 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
648 clock-names = "fck";
649 #address-cells = <1>;
650 #size-cells = <1>;
655 compatible = "ti,am4372-qspi";
658 reg-names = "qspi_base", "qspi_mmap";
660 clock-names = "fck";
661 #address-cells = <1>;
662 #size-cells = <0>;
664 num-cs = <4>;
668 target-module@40300000 {
669 compatible = "ti,sysc-omap4-simple", "ti,sysc";
671 clock-names = "fck";
672 ti,no-idle;
673 #address-cells = <1>;
674 #size-cells = <1>;
678 compatible = "mmio-sram";
681 #address-cells = <1>;
682 #size-cells = <1>;
684 pm_sram_code: pm-code-sram@0 {
687 protect-exec;
690 pm_sram_data: pm-data-sram@1000 {
698 target-module@56000000 {
699 compatible = "ti,sysc-omap4", "ti,sysc";
702 reg-names = "rev", "sysc";
703 ti,sysc-midle = <SYSC_IDLE_FORCE>,
706 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
710 clock-names = "fck";
711 power-domains = <&prm_gfx>;
713 reset-names = "rstctrl";
714 #address-cells = <1>;
715 #size-cells = <1>;
721 #include "am437x-l4.dtsi"
722 #include "am43xx-clocks.dtsi"
726 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
728 #power-domain-cells = <0>;
732 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
734 #power-domain-cells = <0>;
735 #reset-cells = <1>;
739 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
741 #power-domain-cells = <0>;
745 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
747 #power-domain-cells = <0>;
751 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
753 #power-domain-cells = <0>;
757 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
759 #reset-cells = <1>;
760 #power-domain-cells = <0>;
764 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
766 #reset-cells = <1>;
767 #power-domain-cells = <0>;
771 compatible = "ti,am4-prm-inst", "ti,omap-prm-inst";
773 #reset-cells = <1>;
777 /* Preferred always-on timer for clocksource */
779 ti,no-reset-on-init;
780 ti,no-idle;
783 clock-names = "fck", "ick";
785 assigned-clocks = <&timer1_fck>;
786 assigned-clock-parents = <&sys_clkin_ck>;
792 ti,no-reset-on-init;
793 ti,no-idle;
796 clock-names = "fck", "ick";
798 assigned-clocks = <&timer2_fck>;
799 assigned-clock-parents = <&sys_clkin_ck>;