Lines Matching +full:opp +full:- +full:600000000
1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/am33xx.h>
11 #include <dt-bindings/clock/am3.h>
15 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <1>;
30 d-can0 = &dcan0;
31 d-can1 = &dcan1;
46 #address-cells = <1>;
47 #size-cells = <0>;
49 compatible = "arm,cortex-a8";
50 enable-method = "ti,am3352";
54 operating-points-v2 = <&cpu0_opp_table>;
57 clock-names = "cpu";
59 clock-latency = <300000>; /* From omap-cpufreq driver */
60 cpu-idle-states = <&mpu_gate>;
63 idle-states {
65 compatible = "arm,idle-state";
66 entry-latency-us = <40>;
67 exit-latency-us = <90>;
68 min-residency-us = <300>;
69 ti,idle-wkup-m3;
74 cpu0_opp_table: opp-table {
75 compatible = "operating-points-v2-ti-cpu";
79 * The three following nodes are marked with opp-suspend
83 opp50-300000000 {
84 opp-hz = /bits/ 64 <300000000>;
85 opp-microvolt = <950000 931000 969000>;
86 opp-supported-hw = <0x06 0x0010>;
87 opp-suspend;
90 opp100-275000000 {
91 opp-hz = /bits/ 64 <275000000>;
92 opp-microvolt = <1100000 1078000 1122000>;
93 opp-supported-hw = <0x01 0x00FF>;
94 opp-suspend;
97 opp100-300000000 {
98 opp-hz = /bits/ 64 <300000000>;
99 opp-microvolt = <1100000 1078000 1122000>;
100 opp-supported-hw = <0x06 0x0020>;
101 opp-suspend;
104 opp100-500000000 {
105 opp-hz = /bits/ 64 <500000000>;
106 opp-microvolt = <1100000 1078000 1122000>;
107 opp-supported-hw = <0x01 0xFFFF>;
110 opp100-600000000 {
111 opp-hz = /bits/ 64 <600000000>;
112 opp-microvolt = <1100000 1078000 1122000>;
113 opp-supported-hw = <0x06 0x0040>;
116 opp120-600000000 {
117 opp-hz = /bits/ 64 <600000000>;
118 opp-microvolt = <1200000 1176000 1224000>;
119 opp-supported-hw = <0x01 0xFFFF>;
122 opp120-720000000 {
123 opp-hz = /bits/ 64 <720000000>;
124 opp-microvolt = <1200000 1176000 1224000>;
125 opp-supported-hw = <0x06 0x0080>;
128 oppturbo-720000000 {
129 opp-hz = /bits/ 64 <720000000>;
130 opp-microvolt = <1260000 1234800 1285200>;
131 opp-supported-hw = <0x01 0xFFFF>;
134 oppturbo-800000000 {
135 opp-hz = /bits/ 64 <800000000>;
136 opp-microvolt = <1260000 1234800 1285200>;
137 opp-supported-hw = <0x06 0x0100>;
140 oppnitro-1000000000 {
141 opp-hz = /bits/ 64 <1000000000>;
142 opp-microvolt = <1325000 1298500 1351500>;
143 opp-supported-hw = <0x04 0x0200>;
147 target-module@4b000000 {
148 compatible = "ti,sysc-omap4-simple", "ti,sysc";
150 clock-names = "fck";
151 ti,no-idle;
152 #address-cells = <1>;
153 #size-cells = <1>;
156 target-module@140000 {
157 compatible = "ti,sysc-omap4-simple", "ti,sysc";
159 clock-names = "fck";
160 #address-cells = <1>;
161 #size-cells = <1>;
165 compatible = "arm,cortex-a8-pmu";
176 compatible = "ti,omap-infra";
187 compatible = "simple-pm-bus";
188 power-domains = <&prm_per>;
190 clock-names = "fck";
191 #address-cells = <1>;
192 #size-cells = <1>;
206 intc: interrupt-controller@48200000 {
207 compatible = "ti,am33xx-intc";
208 interrupt-controller;
209 #interrupt-cells = <1>;
213 target-module@49000000 {
214 compatible = "ti,sysc-omap4", "ti,sysc";
216 reg-names = "rev";
218 clock-names = "fck";
219 #address-cells = <1>;
220 #size-cells = <1>;
224 compatible = "ti,edma3-tpcc";
226 reg-names = "edma3_cc";
228 interrupt-names = "edma3_ccint", "edma3_mperr",
230 dma-requests = <64>;
231 #dma-cells = <2>;
236 ti,edma-memcpy-channels = <20 21>;
240 target-module@49800000 {
241 compatible = "ti,sysc-omap4", "ti,sysc";
244 reg-names = "rev", "sysc";
245 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
246 ti,sysc-midle = <SYSC_IDLE_FORCE>;
247 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
250 clock-names = "fck";
251 #address-cells = <1>;
252 #size-cells = <1>;
256 compatible = "ti,edma3-tptc";
259 interrupt-names = "edma3_tcerrint";
263 target-module@49900000 {
264 compatible = "ti,sysc-omap4", "ti,sysc";
267 reg-names = "rev", "sysc";
268 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
269 ti,sysc-midle = <SYSC_IDLE_FORCE>;
270 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
273 clock-names = "fck";
274 #address-cells = <1>;
275 #size-cells = <1>;
279 compatible = "ti,edma3-tptc";
282 interrupt-names = "edma3_tcerrint";
286 target-module@49a00000 {
287 compatible = "ti,sysc-omap4", "ti,sysc";
290 reg-names = "rev", "sysc";
291 ti,sysc-mask = <SYSC_OMAP4_SOFTRESET>;
292 ti,sysc-midle = <SYSC_IDLE_FORCE>;
293 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
296 clock-names = "fck";
297 #address-cells = <1>;
298 #size-cells = <1>;
302 compatible = "ti,edma3-tptc";
305 interrupt-names = "edma3_tcerrint";
309 target-module@47810000 {
310 compatible = "ti,sysc-omap2", "ti,sysc";
314 reg-names = "rev", "sysc", "syss";
315 ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
319 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
322 ti,syss-mask = <1>;
324 clock-names = "fck";
325 #address-cells = <1>;
326 #size-cells = <1>;
330 compatible = "ti,am335-sdhci";
331 ti,needs-special-reset;
338 usb: target-module@47400000 {
339 compatible = "ti,sysc-omap4", "ti,sysc";
342 reg-names = "rev", "sysc";
343 ti,sysc-mask = <(SYSC_OMAP4_FREEEMU |
345 ti,sysc-midle = <SYSC_IDLE_FORCE>,
348 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
353 clock-names = "fck";
354 #address-cells = <1>;
355 #size-cells = <1>;
358 usb0_phy: usb-phy@1300 {
359 compatible = "ti,am335x-usb-phy";
361 reg-names = "phy";
363 #phy-cells = <0>;
367 compatible = "ti,musb-am33xx";
370 reg-names = "mc", "control";
373 interrupt-names = "mc";
376 mentor,num-eps = <16>;
377 mentor,ram-bits = <12>;
396 dma-names =
405 usb1_phy: usb-phy@1b00 {
406 compatible = "ti,am335x-usb-phy";
408 reg-names = "phy";
410 #phy-cells = <0>;
414 compatible = "ti,musb-am33xx";
417 reg-names = "mc", "control";
419 interrupt-names = "mc";
422 mentor,num-eps = <16>;
423 mentor,ram-bits = <12>;
442 dma-names =
451 cppi41dma: dma-controller@2000 {
452 compatible = "ti,am3359-cppi41";
457 reg-names = "glue", "controller", "scheduler", "queuemgr";
459 interrupt-names = "glue";
460 #dma-cells = <2>;
462 #dma-channels = <30>;
463 dma-channels = <30>;
464 #dma-requests = <256>;
465 dma-requests = <256>;
469 target-module@40300000 {
470 compatible = "ti,sysc-omap4-simple", "ti,sysc";
472 clock-names = "fck";
473 ti,no-idle;
474 #address-cells = <1>;
475 #size-cells = <1>;
479 compatible = "mmio-sram";
482 #address-cells = <1>;
483 #size-cells = <1>;
485 pm_sram_code: pm-code-sram@0 {
488 protect-exec;
491 pm_sram_data: pm-data-sram@1000 {
499 target-module@4c000000 {
500 compatible = "ti,sysc-omap4-simple", "ti,sysc";
502 reg-names = "rev";
504 clock-names = "fck";
505 ti,no-idle;
506 #address-cells = <1>;
507 #size-cells = <1>;
511 compatible = "ti,emif-am3352";
519 target-module@50000000 {
520 compatible = "ti,sysc-omap2", "ti,sysc";
524 reg-names = "rev", "sysc", "syss";
525 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
528 ti,syss-mask = <1>;
530 clock-names = "fck";
531 #address-cells = <1>;
532 #size-cells = <1>;
537 compatible = "ti,am3352-gpmc";
541 dma-names = "rxtx";
542 gpmc,num-cs = <7>;
543 gpmc,num-waitpins = <2>;
544 #address-cells = <2>;
545 #size-cells = <1>;
546 interrupt-controller;
547 #interrupt-cells = <2>;
548 gpio-controller;
549 #gpio-cells = <2>;
554 sham_target: target-module@53100000 {
555 compatible = "ti,sysc-omap3-sham", "ti,sysc";
559 reg-names = "rev", "sysc", "syss";
560 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
562 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
565 ti,syss-mask = <1>;
568 clock-names = "fck";
569 #address-cells = <1>;
570 #size-cells = <1>;
574 compatible = "ti,omap4-sham";
578 dma-names = "rx";
582 aes_target: target-module@53500000 {
583 compatible = "ti,sysc-omap2", "ti,sysc";
587 reg-names = "rev", "sysc", "syss";
588 ti,sysc-mask = <(SYSC_OMAP2_SOFTRESET |
590 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
594 ti,syss-mask = <1>;
597 clock-names = "fck";
598 #address-cells = <1>;
599 #size-cells = <1>;
603 compatible = "ti,omap4-aes";
608 dma-names = "tx", "rx";
612 target-module@56000000 {
613 compatible = "ti,sysc-omap4", "ti,sysc";
616 reg-names = "rev", "sysc";
617 ti,sysc-midle = <SYSC_IDLE_FORCE>,
620 ti,sysc-sidle = <SYSC_IDLE_FORCE>,
624 clock-names = "fck";
625 power-domains = <&prm_gfx>;
627 reset-names = "rstctrl";
628 #address-cells = <1>;
629 #size-cells = <1>;
640 #include "am33xx-l4.dtsi"
641 #include "am33xx-clocks.dtsi"
645 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
647 #reset-cells = <1>;
648 #power-domain-cells = <0>;
652 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
654 #reset-cells = <1>;
655 #power-domain-cells = <0>;
659 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
661 #power-domain-cells = <0>;
665 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
667 #reset-cells = <1>;
671 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
673 #power-domain-cells = <0>;
677 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
679 #power-domain-cells = <0>;
680 #reset-cells = <1>;
684 compatible = "ti,am3-prm-inst", "ti,omap-prm-inst";
686 #power-domain-cells = <0>;
690 /* Preferred always-on timer for clocksource */
694 clock-names = "fck", "ick";
695 ti,no-reset-on-init;
696 ti,no-idle;
698 assigned-clocks = <&timer1_fck>;
699 assigned-clock-parents = <&sys_clkin_ck>;
707 clock-names = "fck", "ick";
708 ti,no-reset-on-init;
709 ti,no-idle;
711 assigned-clocks = <&timer2_fck>;
712 assigned-clock-parents = <&sys_clkin_ck>;