Lines Matching +full:am3352 +full:- +full:gpmc
1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/
5 /dts-v1/;
15 cpu0-supply = <&dcdc2_reg>;
25 compatible = "gpio-leds";
30 default-state = "off";
36 pinctrl-names = "default";
37 pinctrl-0 = <&misc_pins>;
40 pinctrl-single,pins = <
46 pinctrl-single,pins = <
90 pinctrl-single,pins = <
97 pinctrl-single,pins = <
104 pinctrl-single,pins = <
113 pinctrl-single,pins = <
122 pinctrl-single,pins = <
131 pinctrl-single,pins = <
140 pinctrl-single,pins = <
147 pinctrl-single,pins = <
161 pinctrl-names = "default";
162 pinctrl-0 = <&uart0_pins>;
167 pinctrl-names = "default";
168 pinctrl-0 = <&uart1_pins>;
170 rts-gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
171 rs485-rts-active-high;
172 rs485-rx-during-tx;
173 rs485-rts-delay = <1 1>;
174 linux,rs485-enabled-at-boot-time;
178 pinctrl-names = "default";
179 pinctrl-0 = <&uart2_pins>;
181 rts-gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>;
182 rs485-rts-active-high;
183 rs485-rts-delay = <1 1>;
184 linux,rs485-enabled-at-boot-time;
188 pinctrl-names = "default";
189 pinctrl-0 = <&uart3_pins>;
194 pinctrl-names = "default";
195 pinctrl-0 = <&uart4_pins>;
200 pinctrl-names = "default";
201 pinctrl-0 = <&uart5_pins>;
207 pinctrl-names = "default";
208 clock-frequency = <400000>;
209 pinctrl-names = "default";
210 pinctrl-0 = <&i2c0_pins>;
214 gpio-controller;
215 #gpio-cells = <2>;
239 &gpmc {
240 compatible = "ti,am3352-gpmc";
242 gpmc,num-waitpins = <2>;
243 pinctrl-names = "default";
244 pinctrl-0 = <&gpmc_pins>;
246 #address-cells = <2>;
247 #size-cells = <1>;
253 compatible = "cfi-flash";
254 linux,mtd-name = "spansion,s29gl010p11t";
255 bank-width = <2>;
257 gpmc,mux-add-data = <2>;
259 gpmc,sync-clk-ps = <0>;
260 gpmc,cs-on-ns = <0>;
261 gpmc,cs-rd-off-ns = <160>;
262 gpmc,cs-wr-off-ns = <160>;
263 gpmc,adv-on-ns = <10>;
264 gpmc,adv-rd-off-ns = <30>;
265 gpmc,adv-wr-off-ns = <30>;
266 gpmc,oe-on-ns = <40>;
267 gpmc,oe-off-ns = <160>;
268 gpmc,we-on-ns = <40>;
269 gpmc,we-off-ns = <160>;
270 gpmc,rd-cycle-ns = <160>;
271 gpmc,wr-cycle-ns = <160>;
272 gpmc,access-ns = <150>;
273 gpmc,page-burst-access-ns = <10>;
274 gpmc,cycle2cycle-samecsen;
275 gpmc,cycle2cycle-delay-ns = <20>;
276 gpmc,wr-data-mux-bus-ns = <70>;
277 gpmc,wr-access-ns = <80>;
279 #address-cells = <1>;
280 #size-cells = <1>;
285 +------------+-->0x00000000-> U-Boot start
287 | |-->0x000BFFFF-> U-Boot end
288 | |-->0x000C0000-> ENV1 start
290 | |-->0x000DFFFF-> ENV1 end
291 | |-->0x000E0000-> ENV2 start
293 | |-->0x000FFFFF-> ENV2 end
294 | |-->0x00100000-> Kernel start
296 | |-->0x004FFFFF-> Kernel end
297 | |-->0x00500000-> File system start
299 | |-->0x01FFFFFF-> File system end
300 | |-->0x02000000-> User data start
302 | |-->0x03FFFFFF-> User data end
303 | |-->0x04000000-> Data storage start
305 +------------+-->0x08000000-> NOR end (Free end)
345 bank-width = <2>;
347 gpmc,mux-add-data = <2>;
349 gpmc,sync-clk-ps = <0>;
350 gpmc,cs-on-ns = <0>;
351 gpmc,cs-rd-off-ns = <160>;
352 gpmc,cs-wr-off-ns = <160>;
353 gpmc,adv-on-ns = <10>;
354 gpmc,adv-rd-off-ns = <20>;
355 gpmc,adv-wr-off-ns = <20>;
356 gpmc,oe-on-ns = <30>;
357 gpmc,oe-off-ns = <150>;
358 gpmc,we-on-ns = <30>;
359 gpmc,we-off-ns = <150>;
360 gpmc,rd-cycle-ns = <160>;
361 gpmc,wr-cycle-ns = <160>;
362 gpmc,access-ns = <130>;
363 gpmc,page-burst-access-ns = <10>;
364 gpmc,cycle2cycle-samecsen;
365 gpmc,cycle2cycle-diffcsen;
366 gpmc,cycle2cycle-delay-ns = <10>;
367 gpmc,wr-data-mux-bus-ns = <30>;
368 gpmc,wr-access-ns = <0>;
379 ethphy0: ethernet-phy@0 {
383 ethphy1: ethernet-phy@1 {
389 phy-handle = <ðphy0>;
390 phy-mode = "mii";
391 ti,dual-emac-pvid = <1>;
395 phy-handle = <ðphy1>;
396 phy-mode = "mii";
397 ti,dual-emac-pvid = <2>;
402 vmmc-supply = <&ldo4_reg>;
403 pinctrl-names = "default";
404 pinctrl-0 = <&mmc1_pins>;
405 bus-width = <4>;
406 cd-gpios = <&gpio3 8 0>;
407 wp-gpios = <&gpio3 18 0>;
416 regulator-min-microvolt = <1450000>;
417 regulator-max-microvolt = <1550000>;
418 regulator-boot-on;
419 regulator-always-on;
423 /* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
424 regulator-name = "vdd_mpu";
425 regulator-min-microvolt = <915000>;
426 regulator-max-microvolt = <1140000>;
427 regulator-boot-on;
428 regulator-always-on;
432 /* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
433 regulator-name = "vdd_core";
434 regulator-min-microvolt = <915000>;
435 regulator-max-microvolt = <1140000>;
436 regulator-boot-on;
437 regulator-always-on;
442 regulator-min-microvolt = <1750000>;
443 regulator-max-microvolt = <1870000>;
444 regulator-boot-on;
445 regulator-always-on;
450 regulator-min-microvolt = <3175000>;
451 regulator-max-microvolt = <3430000>;
452 regulator-boot-on;
453 regulator-always-on;
458 regulator-min-microvolt = <1750000>;
459 regulator-max-microvolt = <1870000>;
460 regulator-boot-on;
461 regulator-always-on;
466 regulator-min-microvolt = <3175000>;
467 regulator-max-microvolt = <3430000>;
468 regulator-boot-on;
469 regulator-always-on;