Lines Matching full:maintenance
710 corrects this value, ensuring cache maintenance operations which use
719 broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
785 bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
791 cache line maintenance operation by MVA targeting an Inner
795 relevant cache maintenance functions and sets a specific bit
810 bool "ARM errata: A data cache maintenance operation which aborts, might lead to deadlock"
814 r2p6,r2p8,r2p10,r3p0) erratum. In case a data cache maintenance
817 an abort may occur on cache maintenance.
936 bool "ARM errata: Cache maintenance by set/way operations can execute out of order"
939 The v7 ARM states that all cache and branch predictor maintenance
942 However, because of this erratum, an L2 set/way cache maintenance
943 operation can overtake an L1 set/way cache maintenance operation.