31 	p->ainsn.is_short = is_short_instr((unsigned long)p->addr);  in arch_prepare_kprobe()
58 	if (p->ainsn.t1_addr) {  in arch_remove_kprobe()
59 		*(p->ainsn.t1_addr) = p->ainsn.t1_opcode;  in arch_remove_kprobe()
61 		flush_icache_range((unsigned long)p->ainsn.t1_addr,  in arch_remove_kprobe()
62 				   (unsigned long)p->ainsn.t1_addr +  in arch_remove_kprobe()
65 		p->ainsn.t1_addr = NULL;  in arch_remove_kprobe()
68 	if (p->ainsn.t2_addr) {  in arch_remove_kprobe()
69 		*(p->ainsn.t2_addr) = p->ainsn.t2_opcode;  in arch_remove_kprobe()
71 		flush_icache_range((unsigned long)p->ainsn.t2_addr,  in arch_remove_kprobe()
72 				   (unsigned long)p->ainsn.t2_addr +  in arch_remove_kprobe()
75 		p->ainsn.t2_addr = NULL;  in arch_remove_kprobe()
102 	if (p->ainsn.t1_addr) {  in resume_execution()
103 		*(p->ainsn.t1_addr) = p->ainsn.t1_opcode;  in resume_execution()
105 		flush_icache_range((unsigned long)p->ainsn.t1_addr,  in resume_execution()
106 				   (unsigned long)p->ainsn.t1_addr +  in resume_execution()
109 		p->ainsn.t1_addr = NULL;  in resume_execution()
112 	if (p->ainsn.t2_addr) {  in resume_execution()
113 		*(p->ainsn.t2_addr) = p->ainsn.t2_opcode;  in resume_execution()
115 		flush_icache_range((unsigned long)p->ainsn.t2_addr,  in resume_execution()
116 				   (unsigned long)p->ainsn.t2_addr +  in resume_execution()
119 		p->ainsn.t2_addr = NULL;  in resume_execution()
153 		if (!p->ainsn.is_short) {  in setup_singlestep()
174 	p->ainsn.t1_addr = (kprobe_opcode_t *) next_pc;  in setup_singlestep()
175 	p->ainsn.t1_opcode = *(p->ainsn.t1_addr);  in setup_singlestep()
176 	*(p->ainsn.t1_addr) = TRAP_S_2_INSTRUCTION;  in setup_singlestep()
178 	flush_icache_range((unsigned long)p->ainsn.t1_addr,  in setup_singlestep()
179 			   (unsigned long)p->ainsn.t1_addr +  in setup_singlestep()
183 		p->ainsn.t2_addr = (kprobe_opcode_t *) tgt_if_br;  in setup_singlestep()
184 		p->ainsn.t2_opcode = *(p->ainsn.t2_addr);  in setup_singlestep()
185 		*(p->ainsn.t2_addr) = TRAP_S_2_INSTRUCTION;  in setup_singlestep()
187 		flush_icache_range((unsigned long)p->ainsn.t2_addr,  in setup_singlestep()
188 				   (unsigned long)p->ainsn.t2_addr +  in setup_singlestep()