Lines Matching +full:1 +full:- +full:9 +full:a +full:- +full:d

1 // SPDX-License-Identifier: GPL-2.0
5  *	Copyright (C) 1995 David A Rusling
6  *	Copyright (C) 1996 Jay A Estabrook
49 	/* Not interested in the bogus interrupts (0,3,4,5,40-47),  in sx164_init_irq()
50 	   NMI (1), or HALT (2).  */  in sx164_init_irq()
56 	if (request_irq(16 + 6, no_action, 0, "timer-cascade", NULL))  in sx164_init_irq()
57 		pr_err("Failed to register timer-cascade interrupt\n");  in sx164_init_irq()
66  * 1        NMI
72  * 7        PCI-ISA Bridge
73  * 8        Interrupt Line A from slot 3
74  * 9        Interrupt Line A from slot 2
75  *10        Interrupt Line A from slot 1
76  *11        Interrupt Line A from slot 0
79  *14        Interrupt Line B from slot 1
83  *18        Interrupt Line C from slot 1
85  *20        Interrupt Line D from slot 3
86  *21        Interrupt Line D from slot 2
87  *22        Interrupt Line D from slot 1
88  *23        Interrupt Line D from slot 0
93  *   7  64 bit PCI option slot 1
95  *   9  32 bit PCI option slot 3
103 		{ 16+ 9, 16+ 9, 16+13, 16+17, 16+21}, /* IdSel 5 slot 2 J17 */  in sx164_map_irq()
105 		{ 16+10, 16+10, 16+14, 16+18, 16+22}, /* IdSel 7 slot 1 J18 */  in sx164_map_irq()
106 		{    -1,    -1,    -1,	  -1,    -1}, /* IdSel 8 SIO        */  in sx164_map_irq()
107 		{ 16+ 8, 16+ 8, 16+12, 16+16, 16+20}  /* IdSel 9 slot 3 J15 */  in sx164_map_irq()
109 	const long min_idsel = 5, max_idsel = 9, irqs_per_slot = 5;  in sx164_map_irq()
129 	 * distribution). -ink  in sx164_init_arch()
132 		((char*)hwrpb + hwrpb->processor_offset);  in sx164_init_arch()
136 	    && (cpu->pal_revision & 0xffff) <= 0x117) {  in sx164_init_arch()
139 		"call_pal 9\n"		/* Allow PALRES insns in kernel mode */  in sx164_init_arch()
141 		"ldah	$16,(1<<(19-16))($31)\n"  in sx164_init_arch()
144 		"lda	$16,9($31)\n"  in sx164_init_arch()
145 		"call_pal 9"		/* Disable PALRES insns */  in sx164_init_arch()