Lines Matching +full:32 +full:- +full:bit
1 // SPDX-License-Identifier: GPL-2.0
9 * Code supporting the Sable, Sable-Gamma, and Lynx systems.
39 /* Note mask bit is true for DISABLED irqs. */
42 void (*update_irq_hw)(unsigned long bit, unsigned long mask);
43 void (*ack_irq_hw)(unsigned long bit);
58 * 0-7 (char at 536)
59 * 8-15 (char at 53a)
60 * 16-23 (char at 53c)
64 * Bit Meaning Kernel IRQ
65 *------------------------------------------
68 * 2 TULIP (builtin) 32
76 *10 EISA irq 3 -
77 *11 EISA irq 4 -
79 *13 EISA irq 6 -
80 *14 EISA irq 7 -
85 *19 EISA irq 12 -
86 *20 EISA irq 13 -
89 *23 IIC -
93 sable_update_irq_hw(unsigned long bit, unsigned long mask) in sable_update_irq_hw() argument
97 if (bit >= 16) { in sable_update_irq_hw()
100 } else if (bit >= 8) { in sable_update_irq_hw()
109 sable_ack_irq_hw(unsigned long bit) in sable_ack_irq_hw() argument
113 if (bit >= 16) { in sable_ack_irq_hw()
115 val1 = 0xE0 | (bit - 16); in sable_ack_irq_hw()
117 } else if (bit >= 8) { in sable_ack_irq_hw()
119 val1 = 0xE0 | (bit - 8); in sable_ack_irq_hw()
123 val1 = 0xE0 | (bit - 0); in sable_ack_irq_hw()
133 -1, 6, -1, 8, 15, 12, 7, 9, /* pseudo PIC 0-7 */
134 -1, 16, 17, 18, 3, -1, 21, 22, /* pseudo PIC 8-15 */
135 -1, -1, -1, -1, -1, -1, -1, -1, /* pseudo EISA 0-7 */
136 -1, -1, -1, -1, -1, -1, -1, -1, /* pseudo EISA 8-15 */
137 2, 1, 0, 4, 5, -1, -1, -1, /* pseudo PCI */
138 -1, -1, -1, -1, -1, -1, -1, -1, /* */
139 -1, -1, -1, -1, -1, -1, -1, -1, /* */
140 -1, -1, -1, -1, -1, -1, -1, -1 /* */
143 34, 33, 32, 12, 35, 36, 1, 6, /* mask 0-7 */
144 3, 7, -1, -1, 5, -1, -1, 4, /* mask 8-15 */
145 9, 10, 11, -1, -1, 14, 15, -1, /* mask 16-23 */
146 -1, -1, -1, -1, -1, -1, -1, -1, /* */
147 -1, -1, -1, -1, -1, -1, -1, -1, /* */
148 -1, -1, -1, -1, -1, -1, -1, -1, /* */
149 -1, -1, -1, -1, -1, -1, -1, -1, /* */
150 -1, -1, -1, -1, -1, -1, -1, -1 /* */
152 -1,
160 outb(-1, 0x537); /* slave 0 */ in sable_init_irq()
161 outb(-1, 0x53b); /* slave 1 */ in sable_init_irq()
162 outb(-1, 0x53d); /* slave 2 */ in sable_init_irq()
177 * 2 PCI-EISA bridge
187 * above for PCI interrupts. The IRQ relates to which bit the interrupt
200 { 32+0, 32+0, 32+0, 32+0, 32+0}, /* IdSel 0, TULIP */ in sable_map_irq()
201 { 32+1, 32+1, 32+1, 32+1, 32+1}, /* IdSel 1, SCSI */ in sable_map_irq()
202 { -1, -1, -1, -1, -1}, /* IdSel 2, SIO */ in sable_map_irq()
203 { -1, -1, -1, -1, -1}, /* IdSel 3, none */ in sable_map_irq()
204 { -1, -1, -1, -1, -1}, /* IdSel 4, none */ in sable_map_irq()
205 { -1, -1, -1, -1, -1}, /* IdSel 5, none */ in sable_map_irq()
206 { 32+2, 32+2, 32+2, 32+2, 32+2}, /* IdSel 6, slot 0 */ in sable_map_irq()
207 { 32+3, 32+3, 32+3, 32+3, 32+3}, /* IdSel 7, slot 1 */ in sable_map_irq()
208 { 32+4, 32+4, 32+4, 32+4, 32+4} /* IdSel 8, slot 2 */ in sable_map_irq()
223 * Bit Meaning Kernel IRQ
224 *------------------------------------------
235 *10 EISA irq 3 -
236 *11 EISA irq 4 -
238 *13 EISA irq 6 -
239 *14 EISA irq 7 -
244 *19 EISA irq 12 -
248 *23 IIC -
249 *24 VGA (builtin) -
257 *32 PCI 0 slot 4 A primary bus 32
292 lynx_update_irq_hw(unsigned long bit, unsigned long mask) in lynx_update_irq_hw() argument
300 *(vulp)T2_AIR; /* re-read to force write */ in lynx_update_irq_hw()
308 lynx_ack_irq_hw(unsigned long bit) in lynx_ack_irq_hw() argument
310 *(vulp)T2_VAR = (u_long) bit; in lynx_ack_irq_hw()
317 -1, 6, -1, 8, 15, 12, 7, 9, /* pseudo PIC 0-7 */
318 -1, 16, 17, 18, 3, -1, 21, 22, /* pseudo PIC 8-15 */
319 -1, -1, -1, -1, -1, -1, -1, -1, /* pseudo */
320 -1, -1, -1, -1, 28, -1, -1, -1, /* pseudo */
321 32, 33, 34, 35, 36, 37, 38, 39, /* mask 32-39 */
322 40, 41, 42, 43, 44, 45, 46, 47, /* mask 40-47 */
323 48, 49, 50, 51, 52, 53, 54, 55, /* mask 48-55 */
324 56, 57, 58, 59, 60, 61, 62, 63 /* mask 56-63 */
327 -1, -1, -1, 12, -1, -1, 1, 6, /* mask 0-7 */
328 3, 7, -1, -1, 5, -1, -1, 4, /* mask 8-15 */
329 9, 10, 11, -1, -1, 14, 15, -1, /* mask 16-23 */
330 -1, -1, -1, -1, 28, -1, -1, -1, /* mask 24-31 */
331 32, 33, 34, 35, 36, 37, 38, 39, /* mask 32-39 */
332 40, 41, 42, 43, 44, 45, 46, 47, /* mask 40-47 */
333 48, 49, 50, 51, 52, 53, 54, 55, /* mask 48-55 */
334 56, 57, 58, 59, 60, 61, 62, 63 /* mask 56-63 */
336 -1,
356 * 2 PCI-EISA bridge
357 * 3 PCI-PCI bridge
358 * 4 NCR 810 (Demi-Lynx only)
382 { -1, -1, -1, -1, -1}, /* IdSel 13, PCEB */ in lynx_map_irq()
383 { -1, -1, -1, -1, -1}, /* IdSel 14, PPB */ in lynx_map_irq()
385 { -1, -1, -1, -1, -1}, /* IdSel 16, none */ in lynx_map_irq()
386 { 32, 32, 33, 34, 35}, /* IdSel 17, slot 4 */ in lynx_map_irq()
390 { -1, -1, -1, -1, -1}, /* IdSel 22, none */ in lynx_map_irq()
392 { -1, -1, -1, -1, -1}, /* IdSel 16 none */ in lynx_map_irq()
394 { -1, -1, -1, -1, -1}, /* IdSel 18 none */ in lynx_map_irq()
395 { -1, -1, -1, -1, -1}, /* IdSel 19 none */ in lynx_map_irq()
396 { -1, -1, -1, -1, -1}, /* IdSel 20 none */ in lynx_map_irq()
397 { -1, -1, -1, -1, -1}, /* IdSel 21 none */ in lynx_map_irq()
412 if (dev->bus->number == 0) { in lynx_swizzle()
413 slot = PCI_SLOT(dev->devfn); in lynx_swizzle()
415 /* Check for the built-in bridge */ in lynx_swizzle()
416 else if (PCI_SLOT(dev->bus->self->devfn) == 3) { in lynx_swizzle()
417 slot = PCI_SLOT(dev->devfn) + 11; in lynx_swizzle()
421 /* Must be a card-based bridge. */ in lynx_swizzle()
423 if (PCI_SLOT(dev->bus->self->devfn) == 3) { in lynx_swizzle()
424 slot = PCI_SLOT(dev->devfn) + 11; in lynx_swizzle()
430 dev = dev->bus->self; in lynx_swizzle()
432 slot = PCI_SLOT(dev->devfn); in lynx_swizzle()
433 } while (dev->bus->self); in lynx_swizzle()
447 unsigned long bit, mask; in sable_lynx_enable_irq() local
449 bit = sable_lynx_irq_swizzle->irq_to_mask[d->irq]; in sable_lynx_enable_irq()
451 mask = sable_lynx_irq_swizzle->shadow_mask &= ~(1UL << bit); in sable_lynx_enable_irq()
452 sable_lynx_irq_swizzle->update_irq_hw(bit, mask); in sable_lynx_enable_irq()
455 printk("%s: mask 0x%lx bit 0x%lx irq 0x%x\n", in sable_lynx_enable_irq()
456 __func__, mask, bit, irq); in sable_lynx_enable_irq()
463 unsigned long bit, mask; in sable_lynx_disable_irq() local
465 bit = sable_lynx_irq_swizzle->irq_to_mask[d->irq]; in sable_lynx_disable_irq()
467 mask = sable_lynx_irq_swizzle->shadow_mask |= 1UL << bit; in sable_lynx_disable_irq()
468 sable_lynx_irq_swizzle->update_irq_hw(bit, mask); in sable_lynx_disable_irq()
471 printk("%s: mask 0x%lx bit 0x%lx irq 0x%x\n", in sable_lynx_disable_irq()
472 __func__, mask, bit, irq); in sable_lynx_disable_irq()
479 unsigned long bit, mask; in sable_lynx_mask_and_ack_irq() local
481 bit = sable_lynx_irq_swizzle->irq_to_mask[d->irq]; in sable_lynx_mask_and_ack_irq()
483 mask = sable_lynx_irq_swizzle->shadow_mask |= 1UL << bit; in sable_lynx_mask_and_ack_irq()
484 sable_lynx_irq_swizzle->update_irq_hw(bit, mask); in sable_lynx_mask_and_ack_irq()
485 sable_lynx_irq_swizzle->ack_irq_hw(bit); in sable_lynx_mask_and_ack_irq()
501 so-called legacy IRQs for many common devices. */ in sable_lynx_srm_device_interrupt()
503 int bit, irq; in sable_lynx_srm_device_interrupt() local
505 bit = (vector - 0x800) >> 4; in sable_lynx_srm_device_interrupt()
506 irq = sable_lynx_irq_swizzle->mask_to_irq[bit]; in sable_lynx_srm_device_interrupt()
508 printk("%s: vector 0x%lx bit 0x%x irq 0x%x\n", in sable_lynx_srm_device_interrupt()
509 __func__, vector, bit, irq); in sable_lynx_srm_device_interrupt()
579 .vector_name = "Sable-Gamma",