Lines Matching +full:external +full:- +full:clock +full:- +full:frequency

1 .. SPDX-License-Identifier: GPL-2.0
4 PTP hardware clock infrastructure for Linux
10   programs, synchronizing Linux with external clocks, and using the
13   A new class driver exports a kernel interface for specific clock
15   complete set of PTP hardware clock functionality.
17   + Basic clock operations
18     - Set time
19     - Get time
20     - Shift the clock by a given offset atomically
21     - Adjust clock frequency
23   + Ancillary clock features
24     - Time stamp external events
25     - Period output signals configurable from user space
26     - Low Pass Filter (LPF) access from user space
27     - Synchronization of the Linux system time via the PPS subsystem
29 PTP hardware clock kernel API
32    A PTP clock driver registers itself with the class driver. The
34    author of a clock driver need only implement the details of
35    programming the clock hardware. The clock driver notifies the class
36    driver of asynchronous events (alarms and external time stamps) via
39    The class driver supports multiple PTP clock drivers. In normal use
40    cases, only one PTP clock is needed. However, for testing and
41    development, it can be useful to have more than one clock in a
44 PTP hardware clock user space API
48    registered clock. User space can use an open file descriptor from
49    the character device as a POSIX clock id and may call
51    implement the basic clock operations.
53    User space programs may control the clock using standardized
55    ancillary clock features. User space can receive time stamped
58 Writing clock drivers
61    Clock drivers include include/linux/ptp_clock_kernel.h and register
63    registration method. Clock drivers must implement all of the
64    functions in the interface. If a clock does not offer a particular
65    ancillary feature, then the driver should just return -EOPNOTSUPP
73    class driver, since the lock may also be needed by the clock
81      - 2 Time stamp external triggers, programmable polarity (opt. interrupt)
82      - 2 Alarm registers (optional interrupt)
83      - 3 Periodic signals (optional interrupt)
87      - 6 GPIOs programmable as inputs or outputs
88      - 6 GPIOs with dedicated functions (LED/JTAG/clock) can also be
90      - GPIO inputs can time stamp external triggers
91      - GPIO outputs can produce periodic signals
92      - 1 interrupt pin
96      - Auxiliary Slave/Master Mode Snapshot (optional interrupt)
97      - Target Time (optional interrupt)
101      - Up to 4 independent PHC channels
102      - Integrated low pass filter (LPF), access via .adjPhase (compliant to ITU-T G.8273.2)
103      - Programmable output periodic signals
104      - Programmable inputs can time stamp external triggers
105      - Driver and/or hardware configuration through firmware (idtcm.bin)
106 …- LPF settings (bandwidth, phase limiting, automatic holdover, physical layer assist (per ITU-T G.…
107 …- Programmable output PTP clocks, any frequency up to 1GHz (to other PHY/MAC time stampers, refclk…
108 …       - Lock to GNSS input, automatic switching between GNSS and user-space PHC control (optional)