Lines Matching +full:led +full:- +full:open +full:- +full:drain

16   - The descriptor-based interface is the preferred way to manipulate GPIOs,
18   - The legacy integer-based interface which is considered deprecated (but still
21 The remainder of this document applies to the new descriptor-based interface.
23 integer-based interface.
29 A "General Purpose Input/Output" (GPIO) is a flexible software-controlled
37 System-on-Chip (SOC) processors heavily rely on GPIOs. In some cases, every
38 non-dedicated pin can be configured as a GPIO; and most chips have at least
43 Most PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
48   - Output values are writable (high=1, low=0). Some chips also have
50     value might be driven, supporting "wire-OR" and similar schemes for the
51     other value (notably, "open drain" signaling).
53   - Input values are likewise readable (1, 0). Some chips support readback
54     of pins configured as "output", which is very useful in such "wire-OR"
56     input de-glitch/debounce logic, sometimes with software controls.
58   - Inputs can often be used as IRQ signals, often edge triggered but
62   - Usually a GPIO will be configurable as either input or output, as needed
65   - Most GPIOs can be accessed while holding spinlocks, but those accessed
69 MMC/SD card insertion/removal, detecting card write-protect status, driving
70 a LED, configuring a transceiver, bit-banging a serial bus, poking a hardware
81 Active-High and Active-Low
82 --------------------------
88 being either active-high ("1" means "active", the default) or active-low ("0"
92 Open Drain and Open Source
93 --------------------------
94 Sometimes shared signals need to use "open drain" (where only the low signal
95 level is actually driven), or "open source" (where only the high signal level is
96 driven) signaling. That term applies to CMOS transistors; "open collector" is
98 This is sometimes called a "wire-AND"; or more practically, from the negative
99 logic (low=true) perspective this is a "wire-OR".
101 One common example of an open drain signal is a shared active-low IRQ line.
102 Also, bidirectional data bus signals sometimes use open drain signals.
104 Some GPIO controllers directly support open drain and open source outputs; many
105 don't. When you need open drain signaling but your hardware doesn't directly
115 The same logic can be applied to emulate open source signaling, by driving the
116 high signal and configuring the GPIO as input for low. This open drain/open