Lines Matching +full:gpio +full:- +full:lines
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timestamp/nvidia,tegra194-hte.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dipen Patel <dipenp@nvidia.com>
14 known as GTE GPIO and GTE IRQ, which can monitor subset of GPIO and on chip
15 IRQ lines for the state change respectively, upon detection it will record
18 to enable or disable for the hardware timestamping. The GTE GPIO monitors
19 GPIO lines from the AON (always on) GPIO controller.
24 - nvidia,tegra194-gte-aon
25 - nvidia,tegra194-gte-lic
33 nvidia,int-threshold:
44 HTE lines are arranged in 32 bit slice where each bit represents different
47 GPIO GTE and 11 for IRQ GTE.
50 '#timestamp-cells':
54 SoC technical reference manual. For the GTE GPIO, its value is same as
55 mentioned in the nvidia GPIO device tree binding document.
59 - compatible
60 - reg
61 - interrupts
62 - nvidia,slices
63 - "#timestamp-cells"
68 - |
70 compatible = "nvidia,tegra194-gte-aon";
73 nvidia,int-threshold = <1>;
75 #timestamp-cells = <1>;
78 - |
80 compatible = "nvidia,tegra194-gte-lic";
83 nvidia,int-threshold = <1>;
85 #timestamp-cells = <1>;