Lines Matching +full:one +full:- +full:timer +full:- +full:only

1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/timer/arm,sp804.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Haojian Zhuang <haojian.zhuang@linaro.org>
14   16 or 32 bit operation and capable of running in one-shot, periodic, or
15   free-running mode. The input clock is shared, but can be gated and prescaled
16   independently for each timer.
18   There is a viriant of Arm SP804: Hisilicon 64-bit SP804 timer. Some Hisilicon
27           - arm,sp804
28           - hisilicon,sp804
30     - compatible
35       - enum:
36           - arm,sp804
37           - hisilicon,sp804
38       - const: arm,primecell
42       If two interrupts are listed, those are the interrupts for timer
43       1 and 2, respectively. If there is only a single interrupt, it is
44       either a combined interrupt or the sole interrupt of one timer, as
45       specified by the "arm,sp804-has-irq" property.
55       Clocks driving the dual timer hardware. This list should
60       - items:
61           - description: clock for timer 1
62           - description: clock for timer 2
63           - description: bus clock
64       - items:
65           - description: unified clock for both timers and the bus
67   clock-names: true
73   arm,sp804-has-irq:
74     description: If only one interrupt line is connected to the interrupt
75       controller, this property specifies which timer is connected to this
82   - compatible
83   - interrupts
84   - reg
85   - clocks
90   - |
91     timer0: timer@fc800000 {
96         clock-names = "timer1", "timer2", "apb_pclk";