Lines Matching +full:scmi +full:- +full:shmem
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Generic on-chip SRAM
10 - Rob Herring <robh@kernel.org>
19 Following the generic-names recommended practice, node names should
30 - mmio-sram
31 - amlogic,meson-gxbb-sram
32 - arm,juno-sram-ns
33 - atmel,sama5d2-securam
34 - nvidia,tegra186-sysram
35 - nvidia,tegra194-sysram
36 - nvidia,tegra234-sysram
37 - qcom,rpm-msg-ram
38 - rockchip,rk3288-pmu-sram
49 "#address-cells":
52 "#size-cells":
60 no-memory-wc:
67 "^([a-z0-9]*-)?sram(-section)?@[a-f0-9]+$":
75 <vendor>,[<device>-]<usage>
78 - allwinner,sun4i-a10-sram-a3-a4
79 - allwinner,sun4i-a10-sram-c1
80 - allwinner,sun4i-a10-sram-d
81 - allwinner,sun9i-a80-smp-sram
82 - allwinner,sun50i-a64-sram-c
83 - amlogic,meson8-ao-arc-sram
84 - amlogic,meson8b-ao-arc-sram
85 - amlogic,meson8-smp-sram
86 - amlogic,meson8b-smp-sram
87 - amlogic,meson-gxbb-scp-shmem
88 - amlogic,meson-axg-scp-shmem
89 - arm,juno-scp-shmem
90 - arm,scmi-shmem
91 - arm,scp-shmem
92 - renesas,smp-sram
93 - rockchip,rk3066-smp-sram
94 - samsung,exynos4210-sysram
95 - samsung,exynos4210-sysram-ns
96 - socionext,milbeaut-smp-sram
115 protect-exec:
119 read-only, executable during code execution. NOTE: This region must
130 - reg
135 - compatible
136 - reg
144 - qcom,rpm-msg-ram
145 - rockchip,rk3288-pmu-sram
148 - "#address-cells"
149 - "#size-cells"
150 - ranges
155 - |
157 compatible = "mmio-sram";
160 #address-cells = <1>;
161 #size-cells = <1>;
164 smp-sram@100 {
168 device-sram@1000 {
173 exported-sram@20000 {
179 - |
180 // Samsung SMP-capable Exynos SoCs use part of the SYSRAM for the bringup
184 // Therefore reserved section sub-nodes have to be added to the mmio-sram
186 // non-secure execution environment.
188 compatible = "mmio-sram";
190 #address-cells = <1>;
191 #size-cells = <1>;
194 smp-sram@0 {
195 compatible = "samsung,exynos4210-sysram";
199 smp-sram@53000 {
200 compatible = "samsung,exynos4210-sysram-ns";
205 - |
206 // Amlogic's SMP-capable SoCs use part of the sram for the bringup of the cores.
210 // Therefore a reserved section sub-node has to be added to the mmio-sram
213 compatible = "mmio-sram";
215 #address-cells = <1>;
216 #size-cells = <1>;
219 smp-sram@1ff80 {
220 compatible = "amlogic,meson8b-smp-sram";
225 - |
227 compatible = "mmio-sram";
229 #address-cells = <1>;
230 #size-cells = <1>;
233 smp-sram@0 {
234 compatible = "renesas,smp-sram";
239 - |
241 compatible = "mmio-sram";
243 #address-cells = <1>;
244 #size-cells = <1>;
247 smp-sram@10080000 {
248 compatible = "rockchip,rk3066-smp-sram";
253 - |
256 // the "pmu-sram" because it keeps power even in low power states
259 compatible = "rockchip,rk3288-pmu-sram", "mmio-sram";
263 - |
269 // Also there are no "secure-only" properties. The implementation should
273 compatible = "mmio-sram";
275 #address-cells = <1>;
276 #size-cells = <1>;
279 smp-sram@1000 {
282 compatible = "allwinner,sun9i-a80-smp-sram";
287 - |
289 compatible = "mmio-sram";
291 #address-cells = <1>;
292 #size-cells = <1>;
295 smp-sram@f100 {
296 compatible = "socionext,milbeaut-smp-sram";