Lines Matching +full:gcc +full:- +full:sc7280

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/spi/qcom,spi-qcom-qspi.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11   - Bjorn Andersson <bjorn.andersson@linaro.org>
18   - $ref: /schemas/spi/spi-controller.yaml#
23       - enum:
24           - qcom,sc7180-qspi
25           - qcom,sc7280-qspi
26           - qcom,sdm845-qspi
28       - const: qcom,qspi-v1
36   clock-names:
38       - const: iface
39       - const: core
43       - description: AHB clock
44       - description: QSPI core clock
50   interconnect-names:
53       - const: qspi-config
54       - const: qspi-memory
57   - compatible
58   - reg
59   - interrupts
60   - clock-names
61   - clocks
66   - |
67     #include <dt-bindings/clock/qcom,gcc-sdm845.h>
68     #include <dt-bindings/interrupt-controller/arm-gic.h>
71         #address-cells = <2>;
72         #size-cells = <2>;
75             compatible = "qcom,sdm845-qspi", "qcom,qspi-v1";
77             #address-cells = <1>;
78             #size-cells = <0>;
80             clock-names = "iface", "core";
81             clocks = <&gcc GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
82                          <&gcc GCC_QSPI_CORE_CLK>;
85                 compatible = "jedec,spi-nor";
87                 spi-max-frequency = <25000000>;
88                 spi-tx-bus-width = <2>;
89                 spi-rx-bus-width = <2>;