Lines Matching +full:output +full:- +full:high
1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Andrew Davis <afd@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - ti,tlv320adc3140
29 - ti,tlv320adc5140
30 - ti,tlv320adc6140
37 reset-gpios:
42 areg-supply:
47 ti,mic-bias-source:
50 0 - Mic bias is set to VREF
51 1 - Mic bias is set to VREF × 1.096
52 6 - Mic bias is set to AVDD
56 ti,vref-source:
59 0 - Set VREF to 2.75V
60 1 - Set VREF to 2.5V
61 2 - Set VREF to 1.375V
65 ti,pdm-edge-select:
70 0 - (default) Odd channel is latched on the negative edge and even
72 1 - Odd channel is latched on the positive edge and even channel is
75 PDMIN1 - PDMCLK latching edge used for channel 1 and 2 data
76 PDMIN2 - PDMCLK latching edge used for channel 3 and 4 data
77 PDMIN3 - PDMCLK latching edge used for channel 5 and 6 data
78 PDMIN4 - PDMCLK latching edge used for channel 7 and 8 data
80 $ref: /schemas/types.yaml#/definitions/uint32-array
87 ti,gpi-config:
92 0 - (default) disabled
93 1 - GPIX is configured as a general-purpose input (GPI)
94 2 - GPIX is configured as a master clock input (MCLK)
95 3 - GPIX is configured as an ASI input for daisy-chain (SDIN)
96 4 - GPIX is configured as a PDM data input for channel 1 and channel
98 5 - GPIX is configured as a PDM data input for channel 3 and channel
100 6 - GPIX is configured as a PDM data input for channel 5 and channel
102 7 - GPIX is configured as a PDM data input for channel 7 and channel
105 $ref: /schemas/types.yaml#/definitions/uint32-array
112 ti,asi-tx-drive:
115 When set the device will set the Tx ASI output to a Hi-Z state for unused
116 data cycles. Default is to drive the output low on unused ASI cycles.
119 '^ti,gpo-config-[1-4]$':
120 $ref: /schemas/types.yaml#/definitions/uint32-array
122 Defines the configuration and output driver for the general purpose
123 output pins (GPO). These values are pairs, the first value is for the
124 configuration type and the second value is for the output drive type.
127 GPO output configuration can be one of the following:
129 0 - (default) disabled
130 1 - GPOX is configured as a general-purpose output (GPO)
131 2 - GPOX is configured as a device interrupt output (IRQ)
132 3 - GPOX is configured as a secondary ASI output (SDOUT2)
133 4 - GPOX is configured as a PDM clock output (PDMCLK)
135 GPO output drive configuration for the GPO pins can be one of the following:
137 0d - (default) Hi-Z output
138 1d - Drive active low and active high
139 2d - Drive active low and weak high
140 3d - Drive active low and Hi-Z
141 4d - Drive weak low and active high
142 5d - Drive Hi-Z and active high
144 ti,gpio-config:
146 Defines the configuration and output drive for the General Purpose
147 Input and Output pin (GPIO1). Its value is a pair, the first value is for
148 the configuration type and the second value is for the output drive
152 0 - disabled
153 1 - GPIO1 is configured as a general-purpose output (GPO)
154 2 - (default) GPIO1 is configured as a device interrupt output (IRQ)
155 3 - GPIO1 is configured as a secondary ASI output (SDOUT2)
156 4 - GPIO1 is configured as a PDM clock output (PDMCLK)
157 8 - GPIO1 is configured as an input to control when MICBIAS turns on or
159 9 - GPIO1 is configured as a general-purpose input (GPI)
160 10 - GPIO1 is configured as a master clock input (MCLK)
161 11 - GPIO1 is configured as an ASI input for daisy-chain (SDIN)
162 12 - GPIO1 is configured as a PDM data input for channel 1 and channel 2
164 13 - GPIO1 is configured as a PDM data input for channel 3 and channel 4
166 14 - GPIO1 is configured as a PDM data input for channel 5 and channel 6
168 15 - GPIO1 is configured as a PDM data input for channel 7 and channel 8
171 output drive type for the GPIO pin can be one of the following:
172 0 - Hi-Z output
173 1 - Drive active low and active high
174 2 - (default) Drive active low and weak high
175 3 - Drive active low and Hi-Z
176 4 - Drive weak low and active high
177 5 - Drive Hi-Z and active high
179 $ref: /schemas/types.yaml#/definitions/uint32-array
187 - compatible
188 - reg
193 - |
194 #include <dt-bindings/gpio/gpio.h>
196 #address-cells = <1>;
197 #size-cells = <0>;
201 ti,mic-bias-source = <6>;
202 ti,pdm-edge-select = <0 1 0 1>;
203 ti,gpi-config = <4 5 6 7>;
204 ti,gpio-config = <10 2>;
205 ti,gpo-config-1 = <0 0>;
206 ti,gpo-config-2 = <0 0>;
207 reset-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;