Lines Matching +full:general +full:- +full:purpose
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ricard Wanderlof <ricardw@axis.com>
20 - ti,tlv320adc3001
21 - ti,tlv320adc3101
27 '#sound-dai-cells':
30 '#gpio-cells':
33 gpio-controller: true
35 reset-gpios:
43 ti,dmdin-gpio1:
46 - 0 # ADC3XXX_GPIO_DISABLED - I/O buffers powered down and not used
47 - 1 # ADC3XXX_GPIO_INPUT - Various non-GPIO input functions
48 - 2 # ADC3XXX_GPIO_GPI - General purpose input
49 - 3 # ADC3XXX_GPIO_GPO - General purpose output
50 - 4 # ADC3XXX_GPIO_CLKOUT - Clock source set in CLKOUT_MUX reg
51 - 5 # ADC3XXX_GPIO_INT1 - INT1 output
52 - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK
53 - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK
61 ti,dmclk-gpio2:
64 - 0 # ADC3XXX_GPIO_DISABLED - I/O buffers powered down and not used
65 - 1 # ADC3XXX_GPIO_INPUT - Various non-GPIO input functions
66 - 2 # ADC3XXX_GPIO_GPI - General purpose input
67 - 3 # ADC3XXX_GPIO_GPO - General purpose output
68 - 4 # ADC3XXX_GPIO_CLKOUT - Clock source set in CLKOUT_MUX reg
69 - 5 # ADC3XXX_GPIO_INT1 - INT1 output
70 - 6 # ADC3XXX_GPIO_SECONDARY_BCLK - Codec interface secondary BCLK
71 - 7 # ADC3XXX_GPIO_SECONDARY_WCLK - Codec interface secondary WCLK
82 ti,micbias1-vg:
85 - 0 # ADC3XXX_MICBIAS_OFF - Mic bias is powered down
86 - 1 # ADC3XXX_MICBIAS_2_0V - Mic bias is set to 2.0V
87 - 2 # ADC3XXX_MICBIAS_2_5V - Mic bias is set to 2.5V
88 - 3 # ADC3XXX_MICBIAS_AVDD - Mic bias is same as AVDD supply
93 ti,micbias2-vg:
96 - 0 # ADC3XXX_MICBIAS_OFF - Mic bias is powered down
97 - 1 # ADC3XXX_MICBIAS_2_0V - Mic bias is set to 2.0V
98 - 2 # ADC3XXX_MICBIAS_2_5V - Mic bias is set to 2.5V
99 - 3 # ADC3XXX_MICBIAS_AVDD - Mic bias is same as AVDD supply
105 - compatible
106 - reg
107 - clocks
112 - |
114 #include <dt-bindings/gpio/gpio.h>
115 #include <dt-bindings/sound/tlv320adc3xxx.h>
118 #address-cells = <1>;
119 #size-cells = <0>;
120 tlv320adc3101: audio-codec@18 {
123 reset-gpios = <&gpio_pc 3 GPIO_ACTIVE_LOW>;
125 gpio-controller;
126 #gpio-cells = <2>;
127 ti,dmdin-gpio1 = <ADC3XXX_GPIO_GPO>;
128 ti,micbias1-vg = <ADC3XXX_MICBIAS_AVDD>;
133 compatible = "fixed-clock";
134 #clock-cells = <0>;
135 clock-frequency = <24576000>;