Lines Matching full:auxclk
20 PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via
25 PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
29 PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
34 PLL4 ---> PLL4_HSDIV0 ---> MCASP0_AUXCLK ---> McASP0.auxclk
84 - description: AUXCLK clock for McASP used by CPB audio
85 - description: Parent for CPB_McASP auxclk (for 48KHz)
86 - description: Parent for CPB_McASP auxclk (for 44.1KHz)
93 - const: cpb-mcasp-auxclk
94 - const: cpb-mcasp-auxclk-48000
95 - const: cpb-mcasp-auxclk-44100
110 - description: AUXCLK clock for McASP used by CPB audio
111 - description: Parent for CPB_McASP auxclk (for 48KHz)
117 - const: cpb-mcasp-auxclk
118 - const: cpb-mcasp-auxclk-48000
135 clock-names = "cpb-mcasp-auxclk",
136 "cpb-mcasp-auxclk-48000", "cpb-mcasp-auxclk-44100",