Lines Matching +full:mdio +full:- +full:mux +full:- +full:2
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 TI Programmable Real-Time Unit and Industrial Communication Subsystem
11 - Suman Anna <s-anna@ti.com>
15 The Programmable Real-Time Unit and Industrial Communication Subsystem
16 (PRU-ICSS a.k.a. PRUSS) is present on various TI SoCs such as AM335x, AM437x,
17 Keystone 66AK2G, OMAP-L138/DA850 etc. A PRUSS consists of dual 32-bit RISC
18 cores (Programmable Real-Time Units, or PRUs), shared RAM, data and
23 peripheral interfaces, fast real-time responses, or specialized data handling.
25 - an Ethernet MII_RT module with two MII ports
26 - an MDIO port to control external Ethernet PHYs
27 - an Industrial Ethernet Peripheral (IEP) to manage/generate Industrial
29 - an Enhanced Capture Module (eCAP)
30 - an Industrial Ethernet Timer with 7/9 capture and 16 compare events
31 - a 16550-compatible UART to support PROFIBUS
32 - Enhanced GPIO with async capture and serial support
34 A PRU-ICSS subsystem can have up to three shared data memories. A PRU core
35 acts on a primary Data RAM (there are usually 2 Data RAMs) at its address
42 Various sub-modules within a PRU-ICSS subsystem are represented as individual
43 nodes and are defined using a parent-child hierarchy depending on their
48 PRU-ICSS Node
50 Each PRU-ICSS instance is represented as its own node with the individual PRU
51 processor cores, the memories node, an INTC node and an MDIO node represented
53 corresponding interconnect bus nodes or target-module nodes.
60 pattern: "^(pruss|icssg)@[0-9a-f]+$"
64 - ti,am3356-pruss # for AM335x SoC family
65 - ti,am4376-pruss0 # for AM437x SoC family and PRUSS unit 0
66 - ti,am4376-pruss1 # for AM437x SoC family and PRUSS unit 1
67 - ti,am5728-pruss # for AM57xx SoC family
68 - ti,am625-pruss # for K3 AM62x SoC family
69 - ti,am642-icssg # for K3 AM64x SoC family
70 - ti,am654-icssg # for K3 AM65x SoC family
71 - ti,j721e-icssg # for K3 J721E SoC family
72 - ti,k2g-pruss # for 66AK2G SoC family
77 "#address-cells":
80 "#size-cells":
86 dma-ranges:
89 dma-coherent: true
91 power-domains:
93 This property is as per sci-pm-domain.txt.
97 memories@[a-f0-9]+$:
99 The various Data RAMs within a single PRU-ICSS unit are represented as a
106 minItems: 2 # On AM437x one of two PRUSS units don't contain Shared RAM.
108 - description: Address and size of the Data RAM0.
109 - description: Address and size of the Data RAM1.
110 - description: |
115 reg-names:
116 minItems: 2
118 - const: dram0
119 - const: dram1
120 - const: shrdram2
123 - reg
124 - reg-names
128 cfg@[a-f0-9]+$:
130 PRU-ICSS configuration space. CFG sub-module represented as a SysCon.
137 - const: ti,pruss-cfg
138 - const: syscon
140 "#address-cells":
143 "#size-cells":
156 "#address-cells":
159 "#size-cells":
163 coreclk-mux@[a-f0-9]+$:
166 core clock can be set to one of the 2 sources: ICSSG_CORE_CLK or
167 ICSSG_ICLK. This node models this clock mux and should have the
168 name "coreclk-mux".
173 '#clock-cells':
178 - description: ICSSG_CORE Clock
179 - description: ICSSG_ICLK Clock
181 assigned-clocks:
184 assigned-clock-parents:
187 Standard assigned-clocks-parents definition used for selecting
188 mux parent (one of the mux input).
194 - clocks
198 iepclk-mux@[a-f0-9]+$:
200 The IEP module can get its clock from 2 sources: ICSSG_IEP_CLK or
202 mux and should have the name "iepclk-mux".
207 '#clock-cells':
212 - description: ICSSG_IEP Clock
213 - description: Core Clock (OCP Clock in older SoCs)
215 assigned-clocks:
218 assigned-clock-parents:
221 Standard assigned-clocks-parents definition used for selecting
222 mux parent (one of the mux input).
228 - clocks
234 iep@[a-f0-9]+$:
238 AM437x, AM57xx & 66AK2G SoCs) or 2 IEPs (on K3 AM65x, J721E & AM64x SoCs).
243 mii-rt@[a-f0-9]+$:
245 Real-Time Ethernet to support multiple industrial communication protocols.
246 MII-RT sub-module represented as a SysCon.
253 - const: ti,pruss-mii
254 - const: syscon
261 mii-g-rt@[a-f0-9]+$:
263 The Real-time Media Independent Interface to support multiple industrial
264 communication protocols (G stands for Gigabit). MII-G-RT sub-module
272 - const: ti,pruss-mii-g
273 - const: syscon
280 interrupt-controller@[a-f0-9]+$:
284 interrupt-controller node.
285 $ref: /schemas/interrupt-controller/ti,pruss-intc.yaml#
288 mdio@[a-f0-9]+$:
290 MDIO Node. Each PRUSS has an MDIO module that can be used to control
291 external PHYs. The MDIO module used within the PRU-ICSS is an instance of
292 the MDIO Controller used in TI Davinci SoCs.
293 $ref: /schemas/net/ti,davinci-mdio.yaml#
296 "^(pru|rtu|txpru)@[0-9a-f]+$":
303 $ref: /schemas/remoteproc/ti,pru-rproc.yaml#
307 - compatible
308 - reg
309 - ranges
313 # Due to inability of correctly verifying sub-nodes with an @address through
314 # the "required" list, the required sub-nodes below are commented out for now.
317 # - memories
318 # - interrupt-controller
319 # - pru
322 - if:
327 - ti,k2g-pruss
328 - ti,am654-icssg
329 - ti,j721e-icssg
330 - ti,am642-icssg
333 - power-domains
335 - if:
340 - ti,k2g-pruss
343 - dma-coherent
346 - |
348 /* Example 1 AM33xx PRU-ICSS */
350 compatible = "ti,am3356-pruss";
352 #address-cells = <1>;
353 #size-cells = <1>;
360 reg-names = "dram0", "dram1", "shrdram2";
364 compatible = "ti,pruss-cfg", "syscon";
365 #address-cells = <1>;
366 #size-cells = <1>;
371 #address-cells = <1>;
372 #size-cells = <0>;
374 pruss_iepclk_mux: iepclk-mux@30 {
376 #clock-cells = <0>;
383 pruss_mii_rt: mii-rt@32000 {
384 compatible = "ti,pruss-mii", "syscon";
388 pruss_intc: interrupt-controller@20000 {
389 compatible = "ti,pruss-intc";
391 interrupt-controller;
392 #interrupt-cells = <3>;
394 interrupt-names = "host_intr0", "host_intr1",
401 compatible = "ti,am3356-pru";
405 reg-names = "iram", "control", "debug";
406 firmware-name = "am335x-pru0-fw";
410 compatible = "ti,am3356-pru";
414 reg-names = "iram", "control", "debug";
415 firmware-name = "am335x-pru1-fw";
418 pruss_mdio: mdio@32400 {
422 clock-names = "fck";
424 #address-cells = <1>;
425 #size-cells = <0>;
429 - |
431 /* Example 2 AM43xx PRU-ICSS with PRUSS1 node */
432 #include <dt-bindings/interrupt-controller/arm-gic.h>
434 compatible = "ti,am4376-pruss1";
436 #address-cells = <1>;
437 #size-cells = <1>;
444 reg-names = "dram0", "dram1", "shrdram2";
448 compatible = "ti,pruss-cfg", "syscon";
449 #address-cells = <1>;
450 #size-cells = <1>;
455 #address-cells = <1>;
456 #size-cells = <0>;
458 pruss1_iepclk_mux: iepclk-mux@30 {
460 #clock-cells = <0>;
467 pruss1_mii_rt: mii-rt@32000 {
468 compatible = "ti,pruss-mii", "syscon";
472 pruss1_intc: interrupt-controller@20000 {
473 compatible = "ti,pruss-intc";
475 interrupt-controller;
476 #interrupt-cells = <3>;
484 interrupt-names = "host_intr0", "host_intr1",
488 ti,irqs-reserved = /bits/ 8 <0x20>; /* BIT(5) */
492 compatible = "ti,am4376-pru";
496 reg-names = "iram", "control", "debug";
497 firmware-name = "am437x-pru1_0-fw";
501 compatible = "ti,am4376-pru";
505 reg-names = "iram", "control", "debug";
506 firmware-name = "am437x-pru1_1-fw";
509 pruss1_mdio: mdio@32400 {
513 clock-names = "fck";
515 #address-cells = <1>;
516 #size-cells = <0>;