Lines Matching +full:smem +full:- +full:state +full:- +full:names
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Shared Memory State Machine
10 - Andy Gross <agross@kernel.org>
11 - Bjorn Andersson <bjorn.andersson@linaro.org>
12 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
15 The Shared Memory State Machine facilitates broadcasting of single bit state
17 assigned 32 bits of state that can be modified. A processor can through a
25 '#address-cells':
28 qcom,local-host:
36 '#size-cells':
40 "^qcom,ipc-[1-4]$":
41 $ref: /schemas/types.yaml#/definitions/phandle-array
43 - items:
44 - description: phandle to a syscon node representing the APCS registers
45 - description: u32 representing offset to the register within the syscon
46 - description: u32 representing the ipc bit within the register
51 "@[0-9a-f]$":
54 Each processor's state bits are described by a subnode of the SMSM device
55 node. Nodes can either be flagged as an interrupt-controller to denote a
56 remote processor's state bits or the local processors bits. The node
57 names are not important.
63 interrupt-controller:
65 Marks the entry as a interrupt-controller and the state bits to
68 '#interrupt-cells':
75 signal changes of its state bits.
77 '#qcom,smem-state-cells':
84 - reg
87 - required:
88 - '#qcom,smem-state-cells'
89 - required:
90 - interrupt-controller
91 - '#interrupt-cells'
92 - interrupts
97 - compatible
98 - '#address-cells'
99 - '#size-cells'
102 - required:
103 - qcom,ipc-1
104 - required:
105 - qcom,ipc-2
106 - required:
107 - qcom,ipc-3
108 - required:
109 - qcom,ipc-4
114 # The following example shows the SMEM setup for controlling properties of
116 # point-of-view. It encompasses one outbound entry and the outgoing interrupt
118 - |
119 #include <dt-bindings/interrupt-controller/arm-gic.h>
121 shared-memory {
123 #address-cells = <1>;
124 #size-cells = <0>;
125 qcom,ipc-3 = <&apcs 8 19>;
129 #qcom,smem-state-cells = <1>;
135 interrupt-controller;
136 #interrupt-cells = <2>;