Lines Matching +full:dt +full:- +full:bindings

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Chun-Kuang Hu <chunkuang.hu@kernel.org>
11   - Philipp Zabel <p.zabel@pengutronix.de>
15   Start Of Frame (SOF) / End Of Frame (EOF) to each sub-modules on the display
21   Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
27       - mediatek,mt2701-disp-mutex
28       - mediatek,mt2712-disp-mutex
29       - mediatek,mt6795-disp-mutex
30       - mediatek,mt8167-disp-mutex
31       - mediatek,mt8173-disp-mutex
32       - mediatek,mt8183-disp-mutex
33       - mediatek,mt8186-disp-mutex
34       - mediatek,mt8186-mdp3-mutex
35       - mediatek,mt8192-disp-mutex
36       - mediatek,mt8195-disp-mutex
44   power-domains:
45     description: A phandle and PM domain specifier as defined by bindings of
47       Documentation/devicetree/bindings/power/power-domain.yaml for details.
51       - description: MUTEX Clock
53   mediatek,gce-events:
57       include/dt-bindings/gce/<chip>-gce.h of each chips.
58     $ref: /schemas/types.yaml#/definitions/uint32-array
60   mediatek,gce-client-reg:
61     $ref: /schemas/types.yaml#/definitions/phandle-array
64         - description: phandle of GCE
65         - description: GCE subsys id
66         - description: register offset
67         - description: register size
70       a client defined in the header include/dt-bindings/gce/<chip>-gce.h.
73   - compatible
74   - reg
75   - interrupts
76   - power-domains
77   - clocks
82   - |
83     #include <dt-bindings/interrupt-controller/arm-gic.h>
84     #include <dt-bindings/clock/mt8173-clk.h>
85     #include <dt-bindings/power/mt8173-power.h>
86     #include <dt-bindings/gce/mt8173-gce.h>
89         #address-cells = <2>;
90         #size-cells = <2>;
93             compatible = "mediatek,mt8173-disp-mutex";
96             power-domains = <&spm MT8173_POWER_DOMAIN_MM>;
98             mediatek,gce-events = <CMDQ_EVENT_MUTEX0_STREAM_EOF>,