Lines Matching +full:reset +full:- +full:controller

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/reset/hisilicon,hi3660-reset.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Hisilicon System Reset Controller
10   - Wei Xu <xuwei5@hisilicon.com>
13   Please also refer to reset.txt in this directory for common reset
14   controller binding usage.
15   The reset controller registers are part of the system-ctl block on
21       - items:
22           - const: hisilicon,hi3660-reset
23       - items:
24           - const: hisilicon,hi3670-reset
25           - const: hisilicon,hi3660-reset
27   hisi,rst-syscon:
29     description: phandle of the reset's syscon, use hisilicon,rst-syscon instead
32   hisilicon,rst-syscon:
33     description: phandle of the reset's syscon.
36   '#reset-cells':
38       Specifies the number of cells needed to encode a reset source.
39       Cell #1 : offset of the reset assert control register from the syscon
43       Cell #2 : bit position of the reset in the reset control register
47   - compatible
52   - |
53     #include <dt-bindings/interrupt-controller/irq.h>
54     #include <dt-bindings/interrupt-controller/arm-gic.h>
55     #include <dt-bindings/clock/hi3660-clock.h>
58         compatible = "hisilicon,hi3660-iomcu", "syscon";
63         compatible = "hisilicon,hi3660-reset";
64         hisilicon,rst-syscon = <&iomcu>;
65         #reset-cells = <2>;
68     /* Specifying reset lines connected to IP modules */
70         compatible = "snps,designware-i2c";
73         #address-cells = <1>;
74         #size-cells = <0>;
75         clock-frequency = <400000>;
78         pinctrl-names = "default";
79         pinctrl-0 = <&i2c0_pmx_func &i2c0_cfg_func>;