Lines Matching +full:reserved +full:- +full:memory
1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/ti,k3-dsp-rproc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
13 The TI K3 family of SoCs usually have one or more TI DSP Core sub-systems
14 that are used to offload some of the processor-intensive tasks or algorithms,
17 These processor sub-systems usually contain additional sub-modules like
18 L1 and/or L2 caches/SRAMs, an Interrupt Controller, an external memory
23 Each DSP Core sub-system is represented as a single DT node. Each node has a
29 - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
34 - ti,j721e-c66-dsp
35 - ti,j721e-c71-dsp
36 - ti,j721s2-c71-dsp
38 Use "ti,j721e-c66-dsp" for C66x DSPs on K3 J721E SoCs
39 Use "ti,j721e-c71-dsp" for C71x DSPs on K3 J721E SoCs
40 Use "ti,j721s2-c71-dsp" for C71x DSPs on K3 J721S2 SoCs
48 firmware-name:
55 OMAP Mailbox specifier denoting the sub-mailbox, to be used for
57 with the sub-mailbox node used in the firmware image.
60 memory-region:
64 phandle to the reserved memory nodes to be associated with the remoteproc
65 device. There should be at least two reserved memory nodes defined. The
66 reserved memory nodes should be carveout nodes, and should be defined as
68 Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
70 - description: region used for dynamic DMA allocations like vrings and
72 - description: region reserved for firmware image sections
76 # --------------------
79 $ref: /schemas/types.yaml#/definitions/phandle-array
85 phandles to one or more reserved on-chip SRAM regions. The regions
94 - ti,j721e-c66-dsp
99 - description: Address and Size of the L2 SRAM internal memory region
100 - description: Address and Size of the L1 PRAM internal memory region
101 - description: Address and Size of the L1 DRAM internal memory region
102 reg-names:
104 - const: l2sram
105 - const: l1pram
106 - const: l1dram
112 - ti,j721e-c71-dsp
113 - ti,j721s2-c71-dsp
118 - description: Address and Size of the L2 SRAM internal memory region
119 - description: Address and Size of the L1 DRAM internal memory region
120 reg-names:
122 - const: l2sram
123 - const: l1dram
126 - compatible
127 - reg
128 - reg-names
129 - ti,sci
130 - ti,sci-dev-id
131 - ti,sci-proc-ids
132 - resets
133 - firmware-name
134 - mboxes
135 - memory-region
140 - |
142 #address-cells = <2>;
143 #size-cells = <2>;
145 mailbox0_cluster3: mailbox-0 {
146 #mbox-cells = <1>;
149 mailbox0_cluster4: mailbox-1 {
150 #mbox-cells = <1>;
154 compatible = "simple-bus";
155 #address-cells = <2>;
156 #size-cells = <2>;
164 compatible = "ti,j721e-c66-dsp";
168 reg-names = "l2sram", "l1pram", "l1dram";
170 ti,sci-dev-id = <142>;
171 ti,sci-proc-ids = <0x03 0xFF>;
173 firmware-name = "j7-c66_0-fw";
174 memory-region = <&c66_0_dma_memory_region>,
181 compatible = "ti,j721e-c71-dsp";
184 reg-names = "l2sram", "l1dram";
186 ti,sci-dev-id = <15>;
187 ti,sci-proc-ids = <0x30 0xFF>;
189 firmware-name = "j7-c71_0-fw";
190 memory-region = <&c71_0_dma_memory_region>,