Lines Matching +full:glink +full:- +full:channels
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/remoteproc/qcom,sc7280-mss-pil.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sibi Sankar <quic_sibis@quicinc.com>
19 - qcom,sc7280-mss-pil
23 - description: MSS QDSP6 registers
24 - description: RMB registers
26 reg-names:
28 - const: qdsp6
29 - const: rmb
33 - description: MSA Stream 1
34 - description: MSA Stream 2
38 - description: Path leading to system memory
42 - description: Watchdog interrupt
43 - description: Fatal interrupt
44 - description: Ready interrupt
45 - description: Handover interrupt
46 - description: Stop acknowledge interrupt
47 - description: Shutdown acknowledge interrupt
49 interrupt-names:
51 - const: wdog
52 - const: fatal
53 - const: ready
54 - const: handover
55 - const: stop-ack
56 - const: shutdown-ack
60 - description: GCC MSS IFACE clock
61 - description: GCC MSS OFFLINE clock
62 - description: GCC MSS SNOC_AXI clock
63 - description: RPMH PKA clock
64 - description: RPMH XO clock
66 clock-names:
68 - const: iface
69 - const: offline
70 - const: snoc_axi
71 - const: pka
72 - const: xo
74 power-domains:
76 - description: CX power domain
77 - description: MSS power domain
79 power-domain-names:
81 - const: cx
82 - const: mss
86 - description: AOSS restart
87 - description: PDC reset
89 reset-names:
91 - const: mss_restart
92 - const: pdc_reset
94 memory-region:
96 - description: MBA reserved region
97 - description: modem reserved region
99 firmware-name:
100 $ref: /schemas/types.yaml#/definitions/string-array
102 - description: Name of MBA firmware
103 - description: Name of modem firmware
105 qcom,halt-regs:
106 $ref: /schemas/types.yaml#/definitions/phandle-array
108 Halt registers are used to halt transactions of various sub-components
111 - items:
112 - description: phandle to TCSR_MUTEX registers
113 - description: offset to the Q6 halt register
114 - description: offset to the modem halt register
115 - description: offset to the nc halt register
116 - description: offset to the vq6 halt register
118 qcom,ext-regs:
119 $ref: /schemas/types.yaml#/definitions/phandle-array
122 - items:
123 - description: phandle to TCSR_REG registers
124 - description: offset to the force_clk_en register
125 - description: offset to the rscc_disable register
126 - items:
127 - description: phandle to TCSR_MUTEX registers
128 - description: offset to the axim1_clk_off register
129 - description: offset to the crypto_clk_off register
131 qcom,qaccept-regs:
132 $ref: /schemas/types.yaml#/definitions/phandle-array
133 description: QACCEPT registers are used to bring up/down Q-channels
135 - items:
136 - description: phandle to TCSR_MUTEX registers
137 - description: offset to the mdm qaccept register
138 - description: offset to the cx qaccept register
139 - description: offset to the axi qaccept register
143 description: Reference to the AOSS side-channel message RAM.
145 qcom,smem-states:
146 $ref: /schemas/types.yaml#/definitions/phandle-array
149 - description: Stop the modem
151 qcom,smem-state-names:
155 glink-edge:
156 $ref: qcom,glink-edge.yaml#
159 Qualcomm G-Link subnode which represents communication edge, channels
165 - description: IRQ from MSS to GLINK
169 - description: Mailbox for communication between APPS and MSS
178 - compatible
179 - reg
180 - reg-names
181 - iommus
182 - interconnects
183 - interrupts
184 - interrupt-names
185 - clocks
186 - clock-names
187 - power-domains
188 - power-domain-names
189 - resets
190 - reset-names
191 - qcom,halt-regs
192 - qcom,ext-regs
193 - qcom,qaccept-regs
194 - memory-region
195 - qcom,qmp
196 - qcom,smem-states
197 - qcom,smem-state-names
198 - glink-edge
203 - |
204 #include <dt-bindings/clock/qcom,gcc-sc7280.h>
205 #include <dt-bindings/clock/qcom,rpmh.h>
206 #include <dt-bindings/interconnect/qcom,sc7280.h>
207 #include <dt-bindings/interrupt-controller/arm-gic.h>
208 #include <dt-bindings/mailbox/qcom-ipcc.h>
209 #include <dt-bindings/power/qcom-rpmpd.h>
210 #include <dt-bindings/reset/qcom,sdm845-aoss.h>
211 #include <dt-bindings/reset/qcom,sdm845-pdc.h>
214 compatible = "qcom,sc7280-mss-pil";
216 reg-names = "qdsp6", "rmb";
222 interrupts-extended = <&intc GIC_SPI 264 IRQ_TYPE_EDGE_RISING>,
229 interrupt-names = "wdog", "fatal", "ready", "handover",
230 "stop-ack", "shutdown-ack";
237 clock-names = "iface", "offline", "snoc_axi", "pka", "xo";
239 power-domains = <&rpmhpd SC7280_CX>,
241 power-domain-names = "cx", "mss";
243 memory-region = <&mba_mem>, <&mpss_mem>;
247 qcom,smem-states = <&modem_smp2p_out 0>;
248 qcom,smem-state-names = "stop";
252 reset-names = "mss_restart", "pdc_reset";
254 qcom,halt-regs = <&tcsr_mutex 0x23000 0x25000 0x28000 0x33000>;
255 qcom,ext-regs = <&tcsr 0x10000 0x10004>, <&tcsr_mutex 0x26004 0x26008>;
256 qcom,qaccept-regs = <&tcsr_mutex 0x23030 0x23040 0x23020>;
258 glink-edge {
259 interrupts-extended = <&ipcc IPCC_CLIENT_MPSS
265 qcom,remote-pid = <1>;