Lines Matching +full:sifive +full:- +full:blocks +full:- +full:ip +full:- +full:versioning

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright (C) 2020 SiFive, Inc.
4 ---
5 $id: http://devicetree.org/schemas/pwm/pwm-sifive.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: SiFive PWM controller
11   - Sagar Kadam <sagar.kadam@sifive.com>
12   - Paul Walmsley <paul.walmsley@sifive.com>
15   Unlike most other PWM controllers, the SiFive PWM controller currently
19   achievable period. PWM RTL that corresponds to the IP block version
20   numbers can be found here -
22   https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
25   - $ref: pwm.yaml#
30       - enum:
31           - sifive,fu540-c000-pwm
32           - sifive,fu740-c000-pwm
33       - const: sifive,pwm0
35       Should be "sifive,<chip>-pwm" and "sifive,pwm<version>". Supported
36       compatible strings are "sifive,fu540-c000-pwm" and
37       "sifive,fu740-c000-pwm" for the SiFive PWM v0 as integrated onto the
38       SiFive FU540 and FU740 chip respectively, and "sifive,pwm0" for the
39       SiFive PWM v0 IP block with no chip integration tweaks.
40       Please refer to sifive-blocks-ip-versioning.txt for details.
48   "#pwm-cells":
54       Each PWM instance in FU540-C000 has 4 comparators. One interrupt per comparator.
57   - compatible
58   - reg
59   - clocks
60   - interrupts
65   - |
67       compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
70       interrupt-parent = <&plic>;
72       #pwm-cells = <3>;