Lines Matching +full:zynqmp +full:- +full:firmware

1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/xlnx,zynqmp-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx ZynqMP Pinctrl
10   - Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
11   - Rajan Vaja <rajan.vaja@xilinx.com>
14   Please refer to pinctrl-bindings.txt in this directory for details of the
18   ZynqMP's pin configuration nodes act as a container for an arbitrary number of
22   parameters, such as pull-up, slew rate, etc.
32     const: xlnx,zynqmp-pinctrl
35   '^(.*-)?(default|gpio)$':
43         $ref: pinmux-node.yaml#
234           - groups
235           - function
244         $ref: pincfg-node.yaml#
255               pattern: '^MIO([0-9]|[1-6][0-9]|7[0-7])$'
258           bias-pull-up: true
260           bias-pull-down: true
262           bias-disable: true
264           input-schmitt-enable: true
266           input-schmitt-disable: true
268           bias-high-impedance: true
270           low-power-enable: true
272           low-power-disable: true
274           slew-rate:
277           drive-strength:
282           power-source:
286           - required: [ groups ]
287           - required: [ pins ]
294   - $ref: pinctrl.yaml#
297   - compatible
302   - |
303     #include <dt-bindings/pinctrl/pinctrl-zynqmp.h>
304     zynqmp_firmware: zynqmp-firmware {
306           compatible = "xlnx,zynqmp-pinctrl";
308           pinctrl_uart1_default: uart1-default {
316                 slew-rate = <SLEW_RATE_SLOW>;
317                 power-source = <IO_STANDARD_LVCMOS18>;
320              conf-rx {
322                 bias-pull-up;
325              conf-tx {
327                 bias-disable;
328                 input-schmitt-disable;
335          pinctrl-names = "default";
336          pinctrl-0 = <&pinctrl_uart1_default>;