Lines Matching +full:- +full:pinfunc
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre TORGUE <alexandre.torgue@foss.st.com>
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
24 - st,stm32f746-pinctrl
25 - st,stm32f769-pinctrl
26 - st,stm32h743-pinctrl
27 - st,stm32mp135-pinctrl
28 - st,stm32mp157-pinctrl
29 - st,stm32mp157-z-pinctrl
31 '#address-cells':
33 '#size-cells':
37 pins-are-numbered: true
45 $ref: "/schemas/types.yaml#/definitions/phandle-array"
47 - items:
48 - description: syscon node which includes IRQ mux selection
49 - description: The offset of the IRQ mux selection register
50 - description: The field mask of IRQ mux, needed if different of 0xf
55 More details in include/dt-bindings/pinctrl/stm32-pinfunc.h
60 '^gpio@[0-9a-f]*$':
64 gpio-controller: true
65 '#gpio-cells':
67 interrupt-controller: true
68 '#interrupt-cells':
77 gpio-line-names: true
78 gpio-ranges:
87 st,bank-name:
92 - GPIOA
93 - GPIOB
94 - GPIOC
95 - GPIOD
96 - GPIOE
97 - GPIOF
98 - GPIOG
99 - GPIOH
100 - GPIOI
101 - GPIOJ
102 - GPIOK
103 - GPIOZ
105 st,bank-ioport:
114 "^(.+-hog(-[0-9]+)?)$":
117 - gpio-hog
120 - gpio-controller
121 - '#gpio-cells'
122 - reg
123 - clocks
124 - st,bank-name
126 '-[0-9]*$':
141 $ref: "/schemas/types.yaml#/definitions/uint32-array"
145 defined in dt-bindings/pinctrl/<soc>-pinfunc.h directly.
148 - port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
149 - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
150 - function: The function number, can be:
160 - include/dt-bindings/pinctrl/stm32-pinfunc.h
175 bias-disable:
177 bias-pull-down:
179 bias-pull-up:
181 drive-push-pull:
183 drive-open-drain:
185 output-low:
187 output-high:
189 slew-rate:
199 - pinmux
202 - $ref: "pinctrl.yaml#"
205 - compatible
206 - '#address-cells'
207 - '#size-cells'
208 - ranges
209 - pins-are-numbered
214 - |
215 #include <dt-bindings/pinctrl/stm32-pinfunc.h>
216 #include <dt-bindings/mfd/stm32f4-rcc.h>
219 #address-cells = <1>;
220 #size-cells = <1>;
221 compatible = "st,stm32f429-pinctrl";
223 pins-are-numbered;
226 gpio-controller;
227 #gpio-cells = <2>;
231 st,bank-name = "GPIOA";
235 //Example 2 (using gpio-ranges)
237 #address-cells = <1>;
238 #size-cells = <1>;
239 compatible = "st,stm32f429-pinctrl";
241 pins-are-numbered;
244 gpio-controller;
245 #gpio-cells = <2>;
249 st,bank-name = "GPIOB";
250 gpio-ranges = <&pinctrl 0 0 16>;
254 gpio-controller;
255 #gpio-cells = <2>;
259 st,bank-name = "GPIOC";
261 gpio-ranges = <&pinctrl 0 16 3>,
268 usart1_pins_a: usart1-0 {
271 bias-disable;
272 drive-push-pull;
273 slew-rate = <0>;
277 bias-disable;
283 pinctrl-0 = <&usart1_pins_a>;
284 pinctrl-names = "default";