Lines Matching +full:pinmux +full:- +full:id
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzn1-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gareth Williams <gareth.williams.jx@renesas.com>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
16 - enum:
17 - renesas,r9a06g032-pinctrl # RZ/N1D
18 - renesas,r9a06g033-pinctrl # RZ/N1S
19 - const: renesas,rzn1-pinctrl # Generic RZ/N1
23 - description: GPIO Multiplexing Level1 Register Block
24 - description: GPIO Multiplexing Level2 Register Block
29 clock-names:
35 - $ref: "pinctrl.yaml#"
38 - compatible
39 - reg
40 - clocks
41 - clock-names
45 - type: object
47 - $ref: pincfg-node.yaml#
48 - $ref: pinmux-node.yaml#
51 A pin multiplexing sub-node describes how to configure a set of (or a
53 A single sub-node may define several pin configurations.
56 pinmux:
65 same argument list of a single "pinmux" property.
66 Integers values in the "pinmux" argument list are assembled as:
70 <include/dt-bindings/pinctrl/rzn1-pinctrl.h>
78 bias-disable: true
79 bias-pull-up:
81 bias-pull-down:
83 bias-high-impedance: true
84 drive-strength:
88 - pinmux
93 - type: object
101 - |
102 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
103 #include <dt-bindings/pinctrl/rzn1-pinctrl.h>
105 compatible = "renesas,r9a06g032-pinctrl", "renesas,rzn1-pinctrl";
108 clock-names = "bus";
115 pinmux = <
122 * Set the pull-up on the RXD pin of the UART.
125 pinmux = <RZN1_PINMUX(103, RZN1_FUNC_UART0_I)>;
128 pinmux = <RZN1_PINMUX(104, RZN1_FUNC_UART0_I)>;
129 bias-pull-up;