Lines Matching +full:gpio +full:- +full:wo +full:- +full:state
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8350-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
17 - $ref: "pinctrl.yaml#"
18 - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#
22 const: qcom,sm8350-tlmm
28 interrupt-controller: true
29 '#interrupt-cells': true
30 gpio-controller: true
31 gpio-reserved-ranges: true
32 '#gpio-cells': true
33 gpio-ranges: true
34 wakeup-parent: true
37 - compatible
38 - reg
43 '-state$':
45 - $ref: "#/$defs/qcom-sm8350-tlmm-state"
46 - patternProperties:
47 "-pins$":
48 $ref: "#/$defs/qcom-sm8350-tlmm-state"
52 qcom-sm8350-tlmm-state:
61 List of gpio pins affected by the properties specified in this
65 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-3])$"
66 - enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
79 gpio, ibi_i3c, jitter_bist, lpass_slimbus, mdp_vsync, mdp_vsync0,
100 bias-disable: true
101 bias-pull-down: true
102 bias-pull-up: true
103 drive-strength: true
104 input-enable: true
105 output-high: true
106 output-low: true
109 - pins
112 - $ref: "qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state"
113 - if:
116 pattern: "^gpio([0-9]|[1-9][0-9]|1[0-9][0-9]|20[0-3])$"
119 - function
124 - |
125 #include <dt-bindings/interrupt-controller/arm-gic.h>
127 compatible = "qcom,sm8350-tlmm";
130 gpio-controller;
131 #gpio-cells = <2>;
132 interrupt-controller;
133 #interrupt-cells = <2>;
134 gpio-ranges = <&tlmm 0 0 203>;
136 gpio-wo-subnode-state {
138 function = "gpio";
141 uart-w-subnodes-state {
142 rx-pins {
145 bias-pull-up;
148 tx-pins {
151 bias-disable;