Lines Matching +full:enable +full:- +full:bias +full:- +full:control
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/intel,pinctrl-thunderbay.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
13 Intel Thunder Bay SoC integrates a pin controller which enables control
19 const: intel,thunderbay-pinctrl
24 gpio-controller: true
26 '#gpio-cells':
29 gpio-ranges:
37 interrupt-controller: true
39 '#interrupt-cells':
43 '^gpio@[0-9a-f]*$':
58 bias-disable: true
60 bias-pull-down: true
62 bias-pull-up: true
64 drive-strength:
68 bias-bus-hold:
71 input-schmitt-enable:
74 slew-rate:
75 description: GPIO slew rate control.
76 0 - Slow
77 1 - Fast
83 - compatible
84 - reg
85 - gpio-controller
86 - '#gpio-cells'
87 - gpio-ranges
88 - interrupts
89 - interrupt-controller
90 - '#interrupt-cells'
93 - |
94 #include <dt-bindings/interrupt-controller/arm-gic.h>
95 #include <dt-bindings/interrupt-controller/irq.h>
98 compatible = "intel,thunderbay-pinctrl";
100 gpio-controller;
101 #gpio-cells = <0x2>;
102 gpio-ranges = <&pinctrl0 0 0 67>;
105 interrupt-controller;
106 #interrupt-cells = <2>;
111 compatible = "intel,thunderbay-pinctrl";
113 gpio-controller;
114 #gpio-cells = <0x2>;
115 gpio-ranges = <&pinctrl1 0 0 53>;
118 interrupt-controller;
119 #interrupt-cells = <2>;