Lines Matching +full:uniphier +full:- +full:ld20 +full:- +full:dwc3 +full:- +full:glue
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/socionext,uniphier-usb3ss-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier USB3 Super-Speed (SS) PHY
11 USB3 controller implemented on Socionext UniPhier SoCs.
12 Although the controller includes High-Speed PHY and Super-Speed PHY,
13 this describes about Super-Speed PHY.
16 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
21 - socionext,uniphier-pro4-usb3-ssphy
22 - socionext,uniphier-pro5-usb3-ssphy
23 - socionext,uniphier-pxs2-usb3-ssphy
24 - socionext,uniphier-ld20-usb3-ssphy
25 - socionext,uniphier-pxs3-usb3-ssphy
26 - socionext,uniphier-nx1-usb3-ssphy
31 "#phy-cells":
38 clock-names: true
43 reset-names: true
45 vbus-supply:
49 - if:
54 - socionext,uniphier-pro4-usb3-ssphy
55 - socionext,uniphier-pro5-usb3-ssphy
61 clock-names:
63 - const: gio
64 - const: link
68 reset-names:
70 - const: gio
71 - const: link
72 - if:
77 - socionext,uniphier-pxs2-usb3-ssphy
78 - socionext,uniphier-ld20-usb3-ssphy
84 clock-names:
86 - const: link
87 - const: phy
91 reset-names:
93 - const: link
94 - const: phy
95 - if:
100 - socionext,uniphier-pxs3-usb3-ssphy
101 - socionext,uniphier-nx1-usb3-ssphy
107 clock-names:
110 - const: link
111 - const: phy
112 - const: phy-ext
116 reset-names:
118 - const: link
119 - const: phy
122 - compatible
123 - reg
124 - "#phy-cells"
125 - clocks
126 - clock-names
127 - resets
128 - reset-names
133 - |
134 usb-glue@65b00000 {
135 compatible = "socionext,uniphier-ld20-dwc3-glue",
136 "simple-mfd";
137 #address-cells = <1>;
138 #size-cells = <1>;
141 usb_ssphy0: ss-phy@300 {
142 compatible = "socionext,uniphier-ld20-usb3-ssphy";
144 #phy-cells = <0>;
145 clock-names = "link", "phy";
147 reset-names = "link", "phy";
149 vbus-supply = <&usb_vbus0>;