Lines Matching +full:pmu +full:- +full:syscon
1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/phy/samsung,usb3-drd-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Marek Szyprowski <m.szyprowski@samsung.com>
12 - Sylwester Nawrocki <s.nawrocki@samsung.com>
15 For samsung,exynos5250-usbdrd-phy and samsung,exynos5420-usbdrd-phy
18 0 - UTMI+ type phy,
19 1 - PIPE3 type phy.
28 - samsung,exynos5250-usbdrd-phy
29 - samsung,exynos5420-usbdrd-phy
30 - samsung,exynos5433-usbdrd-phy
31 - samsung,exynos7-usbdrd-phy
37 clock-names:
42 - Main PHY clock (same as USB DRD controller i.e. DWC3 IP clock), used
44 - PHY reference clock (usually crystal clock), used for PHY operations,
49 "#phy-cells":
61 samsung,pmu-syscon:
64 Phandle to PMU system controller interface.
66 vbus-supply:
70 vbus-boost-supply:
75 - compatible
76 - clocks
77 - clock-names
78 - "#phy-cells"
79 - reg
80 - samsung,pmu-syscon
83 - if:
88 - samsung,exynos5433-usbdrd-phy
89 - samsung,exynos7-usbdrd-phy
95 clock-names:
97 - const: phy
98 - const: ref
99 - const: phy_utmi
100 - const: phy_pipe
101 - const: itp
107 clock-names:
109 - const: phy
110 - const: ref
115 - |
116 #include <dt-bindings/clock/exynos5420.h>
119 compatible = "samsung,exynos5420-usbdrd-phy";
121 #phy-cells = <1>;
123 clock-names = "phy", "ref";
124 samsung,pmu-syscon = <&pmu_system_controller>;
125 vbus-supply = <&usb300_vbus_reg>;