Lines Matching +full:dsi +full:- +full:phy

1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/rockchip,px30-dsi-dphy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   - Heiko Stuebner <heiko@sntech.de>
13   "#phy-cells":
18       - rockchip,px30-dsi-dphy
19       - rockchip,rk3128-dsi-dphy
20       - rockchip,rk3368-dsi-dphy
21       - rockchip,rk3568-dsi-dphy
28       - description: PLL reference clock
29       - description: Module clock
31   clock-names:
33       - const: ref
34       - const: pclk
36   power-domains:
42       - description: exclusive PHY reset line
44   reset-names:
46       - const: apb
49   - "#phy-cells"
50   - compatible
51   - reg
52   - clocks
53   - clock-names
54   - resets
55   - reset-names
60   - |
61     dsi_dphy: phy@ff2e0000 {
62         compatible = "rockchip,px30-dsi-dphy";
65         clock-names = "ref", "pclk";
67         reset-names = "apb";
68         #phy-cells = <0>;