Lines Matching +full:ref +full:- +full:supply
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Wesley Cheng <quic_wcheng@quicinc.com>
19 - items:
20 - enum:
21 - qcom,ipq8074-qusb2-phy
22 - qcom,msm8953-qusb2-phy
23 - qcom,msm8996-qusb2-phy
24 - qcom,msm8998-qusb2-phy
25 - qcom,qcm2290-qusb2-phy
26 - qcom,sdm660-qusb2-phy
27 - qcom,ipq6018-qusb2-phy
28 - qcom,sm4250-qusb2-phy
29 - qcom,sm6115-qusb2-phy
30 - items:
31 - enum:
32 - qcom,sc7180-qusb2-phy
33 - qcom,sdm670-qusb2-phy
34 - qcom,sdm845-qusb2-phy
35 - qcom,sm6350-qusb2-phy
36 - const: qcom,qusb2-v2-phy
40 "#phy-cells":
46 - description: phy config clock
47 - description: 19.2 MHz ref clk
48 - description: phy interface clock (Optional)
50 clock-names:
53 - const: cfg_ahb
54 - const: ref
55 - const: iface
57 vdd-supply:
59 Phandle to 0.9V regulator supply to PHY digital circuit.
61 vdda-pll-supply:
63 Phandle to 1.8V regulator supply to PHY refclk pll block.
65 vdda-phy-dpdm-supply:
67 Phandle to 3.1V regulator supply to Dp/Dm port signals.
74 nvmem-cells:
80 qcom,tcsr-syscon:
83 $ref: /schemas/types.yaml#/definitions/phandle
89 const: qcom,qusb2-v2-phy
92 qcom,imp-res-offset-value:
97 $ref: /schemas/types.yaml#/definitions/uint32
102 qcom,bias-ctrl-value:
104 It is a 6 bit value that specifies bias-ctrl-value. It is a PHY
106 $ref: /schemas/types.yaml#/definitions/uint32
111 qcom,charge-ctrl-value:
113 It is a 2 bit value that specifies charge-ctrl-value. It is a PHY
115 $ref: /schemas/types.yaml#/definitions/uint32
120 qcom,hstx-trim-value:
124 Possible range is - 15mA to 24mA (stepsize of 600 uA).
125 See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
126 $ref: /schemas/types.yaml#/definitions/uint32
131 qcom,preemphasis-level:
133 It is a 2 bit value that specifies pre-emphasis level.
135 See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
136 $ref: /schemas/types.yaml#/definitions/uint32
141 qcom,preemphasis-width:
144 pre-emphasis (specified using qcom,preemphasis-level) must be in
145 effect. Duration could be half-bit of full-bit.
146 See dt-bindings/phy/phy-qcom-qusb2.h for applicable values.
147 $ref: /schemas/types.yaml#/definitions/uint32
152 qcom,hsdisc-trim-value:
156 $ref: /schemas/types.yaml#/definitions/uint32
162 - compatible
163 - reg
164 - "#phy-cells"
165 - clocks
166 - clock-names
167 - vdd-supply
168 - vdda-pll-supply
169 - vdda-phy-dpdm-supply
170 - resets
175 - |
176 #include <dt-bindings/clock/qcom,gcc-msm8996.h>
178 compatible = "qcom,msm8996-qusb2-phy";
180 #phy-cells = <0>;
184 clock-names = "cfg_ahb", "ref";
186 vdd-supply = <&pm8994_l28>;
187 vdda-pll-supply = <&pm8994_l12>;
188 vdda-phy-dpdm-supply = <&pm8994_l24>;
191 nvmem-cells = <&qusb2p_hstx_trim>;