Lines Matching +full:0 +full:xe450

7 title: Rockchip USB2.0 phy with inno IP block
33     const: 0
72         const: 0
95         const: 0
169       reg = <0xe450 0x10>;
173       #clock-cells = <0>;
176         interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH 0>;
178         #phy-cells = <0>;
182         interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH 0>,
183                      <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH 0>,
184                      <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH 0>;
186         #phy-cells = <0>;