Lines Matching +full:aux +full:- +full:gpios
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
11 - Stanimir Varbanov <svarbanov@mm-sol.com>
20 - qcom,pcie-ipq8064
21 - qcom,pcie-ipq8064-v2
22 - qcom,pcie-apq8064
23 - qcom,pcie-apq8084
24 - qcom,pcie-msm8996
25 - qcom,pcie-ipq4019
26 - qcom,pcie-ipq8074
27 - qcom,pcie-qcs404
28 - qcom,pcie-sa8540p
29 - qcom,pcie-sc7280
30 - qcom,pcie-sc8180x
31 - qcom,pcie-sc8280xp
32 - qcom,pcie-sdm845
33 - qcom,pcie-sm8150
34 - qcom,pcie-sm8250
35 - qcom,pcie-sm8450-pcie0
36 - qcom,pcie-sm8450-pcie1
37 - qcom,pcie-ipq6018
43 reg-names:
51 interrupt-names:
55 # Common definitions for clocks, clock-names and reset.
61 clock-names:
69 resets-names:
73 vdda-supply:
76 vdda_phy-supply:
79 vdda_refclk-supply:
82 vddpe-3v3-supply:
88 phy-names:
90 - const: pciephy
92 power-domains:
95 perst-gpios:
99 wake-gpios:
104 - compatible
105 - reg
106 - reg-names
107 - interrupts
108 - interrupt-names
109 - "#interrupt-cells"
110 - interrupt-map-mask
111 - interrupt-map
112 - clocks
113 - clock-names
116 - $ref: /schemas/pci/pci-bus.yaml#
117 - if:
122 - qcom,pcie-apq8064
123 - qcom,pcie-ipq4019
124 - qcom,pcie-ipq8064
125 - qcom,pcie-ipq8064v2
126 - qcom,pcie-ipq8074
127 - qcom,pcie-qcs404
133 reg-names:
135 - const: dbi # DesignWare PCIe registers
136 - const: elbi # External local bus interface registers
137 - const: parf # Qualcomm specific registers
138 - const: config # PCIe configuration space
140 - if:
145 - qcom,pcie-ipq6018
151 reg-names:
153 - const: dbi # DesignWare PCIe registers
154 - const: elbi # External local bus interface registers
155 - const: atu # ATU address space
156 - const: parf # Qualcomm specific registers
157 - const: config # PCIe configuration space
159 - if:
164 - qcom,pcie-apq8084
165 - qcom,pcie-msm8996
166 - qcom,pcie-sdm845
172 reg-names:
174 - const: parf # Qualcomm specific registers
175 - const: dbi # DesignWare PCIe registers
176 - const: elbi # External local bus interface registers
177 - const: config # PCIe configuration space
179 - if:
184 - qcom,pcie-sc7280
185 - qcom,pcie-sc8180x
186 - qcom,pcie-sc8280xp
187 - qcom,pcie-sm8250
188 - qcom,pcie-sm8450-pcie0
189 - qcom,pcie-sm8450-pcie1
195 reg-names:
197 - const: parf # Qualcomm specific registers
198 - const: dbi # DesignWare PCIe registers
199 - const: elbi # External local bus interface registers
200 - const: atu # ATU address space
201 - const: config # PCIe configuration space
203 - if:
208 - qcom,pcie-apq8064
209 - qcom,pcie-ipq8064
210 - qcom,pcie-ipq8064v2
216 clock-names:
219 - const: core # Clocks the pcie hw block
220 - const: iface # Configuration AHB clock
221 - const: phy # Clocks the pcie PHY block
222 - const: aux # Clocks the pcie AUX block, not on apq8064
223 - const: ref # Clocks the pcie ref block, not on apq8064
227 reset-names:
230 - const: axi # AXI reset
231 - const: ahb # AHB reset
232 - const: por # POR reset
233 - const: pci # PCI reset
234 - const: phy # PHY reset
235 - const: ext # EXT reset, not on apq8064
237 - vdda-supply
238 - vdda_phy-supply
239 - vdda_refclk-supply
241 - if:
246 - qcom,pcie-apq8084
252 clock-names:
254 - const: iface # Configuration AHB clock
255 - const: master_bus # Master AXI clock
256 - const: slave_bus # Slave AXI clock
257 - const: aux # Auxiliary (AUX) clock
260 reset-names:
262 - const: core # Core reset
264 - if:
269 - qcom,pcie-ipq4019
275 clock-names:
277 - const: aux # Auxiliary (AUX) clock
278 - const: master_bus # Master AXI clock
279 - const: slave_bus # Slave AXI clock
283 reset-names:
285 - const: axi_m # AXI master reset
286 - const: axi_s # AXI slave reset
287 - const: pipe # PIPE reset
288 - const: axi_m_vmid # VMID reset
289 - const: axi_s_xpu # XPU reset
290 - const: parf # PARF reset
291 - const: phy # PHY reset
292 - const: axi_m_sticky # AXI sticky reset
293 - const: pipe_sticky # PIPE sticky reset
294 - const: pwr # PWR reset
295 - const: ahb # AHB reset
296 - const: phy_ahb # PHY AHB reset
298 - if:
303 - qcom,pcie-msm8996
306 - properties:
307 clock-names:
309 - const: pipe # Pipe Clock driving internal logic
310 - const: aux # Auxiliary (AUX) clock
311 - const: cfg # Configuration clock
312 - const: bus_master # Master AXI clock
313 - const: bus_slave # Slave AXI clock
314 - properties:
315 clock-names:
317 - const: pipe # Pipe Clock driving internal logic
318 - const: bus_master # Master AXI clock
319 - const: bus_slave # Slave AXI clock
320 - const: cfg # Configuration clock
321 - const: aux # Auxiliary (AUX) clock
327 reset-names: false
329 - if:
334 - qcom,pcie-ipq8074
340 clock-names:
342 - const: iface # PCIe to SysNOC BIU clock
343 - const: axi_m # AXI Master clock
344 - const: axi_s # AXI Slave clock
345 - const: ahb # AHB clock
346 - const: aux # Auxiliary clock
350 reset-names:
352 - const: pipe # PIPE reset
353 - const: sleep # Sleep reset
354 - const: sticky # Core Sticky reset
355 - const: axi_m # AXI Master reset
356 - const: axi_s # AXI Slave reset
357 - const: ahb # AHB Reset
358 - const: axi_m_sticky # AXI Master Sticky reset
360 - if:
365 - qcom,pcie-ipq6018
371 clock-names:
373 - const: iface # PCIe to SysNOC BIU clock
374 - const: axi_m # AXI Master clock
375 - const: axi_s # AXI Slave clock
376 - const: axi_bridge # AXI bridge clock
377 - const: rchng
381 reset-names:
383 - const: pipe # PIPE reset
384 - const: sleep # Sleep reset
385 - const: sticky # Core Sticky reset
386 - const: axi_m # AXI Master reset
387 - const: axi_s # AXI Slave reset
388 - const: ahb # AHB Reset
389 - const: axi_m_sticky # AXI Master Sticky reset
390 - const: axi_s_sticky # AXI Slave Sticky reset
392 - if:
397 - qcom,pcie-qcs404
403 clock-names:
405 - const: iface # AHB clock
406 - const: aux # Auxiliary clock
407 - const: master_bus # AXI Master clock
408 - const: slave_bus # AXI Slave clock
412 reset-names:
414 - const: axi_m # AXI Master reset
415 - const: axi_s # AXI Slave reset
416 - const: axi_m_sticky # AXI Master Sticky reset
417 - const: pipe_sticky # PIPE sticky reset
418 - const: pwr # PWR reset
419 - const: ahb # AHB reset
421 - if:
426 - qcom,pcie-sc7280
432 clock-names:
434 - const: pipe # PIPE clock
435 - const: pipe_mux # PIPE MUX
436 - const: phy_pipe # PIPE output clock
437 - const: ref # REFERENCE clock
438 - const: aux # Auxiliary clock
439 - const: cfg # Configuration clock
440 - const: bus_master # Master AXI clock
441 - const: bus_slave # Slave AXI clock
442 - const: slave_q2a # Slave Q2A clock
443 - const: tbu # PCIe TBU clock
444 - const: ddrss_sf_tbu # PCIe SF TBU clock
445 - const: aggre0 # Aggre NoC PCIe CENTER SF AXI clock
446 - const: aggre1 # Aggre NoC PCIe1 AXI clock
449 reset-names:
451 - const: pci # PCIe core reset
453 - if:
458 - qcom,pcie-sdm845
462 - properties:
466 clock-names:
468 - const: pipe # PIPE clock
469 - const: aux # Auxiliary clock
470 - const: cfg # Configuration clock
471 - const: bus_master # Master AXI clock
472 - const: bus_slave # Slave AXI clock
473 - const: slave_q2a # Slave Q2A clock
474 - const: ref # REFERENCE clock
475 - const: tbu # PCIe TBU clock
476 - properties:
480 clock-names:
482 - const: pipe # PIPE clock
483 - const: aux # Auxiliary clock
484 - const: cfg # Configuration clock
485 - const: bus_master # Master AXI clock
486 - const: bus_slave # Slave AXI clock
487 - const: slave_q2a # Slave Q2A clock
488 - const: tbu # PCIe TBU clock
492 reset-names:
494 - const: pci # PCIe core reset
496 - if:
501 - qcom,pcie-sc8180x
502 - qcom,pcie-sm8150
503 - qcom,pcie-sm8250
507 - properties:
511 clock-names:
513 - const: pipe # PIPE clock
514 - const: aux # Auxiliary clock
515 - const: cfg # Configuration clock
516 - const: bus_master # Master AXI clock
517 - const: bus_slave # Slave AXI clock
518 - const: slave_q2a # Slave Q2A clock
519 - const: ref # REFERENCE clock
520 - const: tbu # PCIe TBU clock
521 - const: ddrss_sf_tbu # PCIe SF TBU clock
522 - properties:
526 clock-names:
528 - const: pipe # PIPE clock
529 - const: aux # Auxiliary clock
530 - const: cfg # Configuration clock
531 - const: bus_master # Master AXI clock
532 - const: bus_slave # Slave AXI clock
533 - const: slave_q2a # Slave Q2A clock
534 - const: tbu # PCIe TBU clock
535 - const: ddrss_sf_tbu # PCIe SF TBU clock
539 reset-names:
541 - const: pci # PCIe core reset
543 - if:
548 - qcom,pcie-sm8450-pcie0
554 clock-names:
556 - const: pipe # PIPE clock
557 - const: pipe_mux # PIPE MUX
558 - const: phy_pipe # PIPE output clock
559 - const: ref # REFERENCE clock
560 - const: aux # Auxiliary clock
561 - const: cfg # Configuration clock
562 - const: bus_master # Master AXI clock
563 - const: bus_slave # Slave AXI clock
564 - const: slave_q2a # Slave Q2A clock
565 - const: ddrss_sf_tbu # PCIe SF TBU clock
566 - const: aggre0 # Aggre NoC PCIe0 AXI clock
567 - const: aggre1 # Aggre NoC PCIe1 AXI clock
570 reset-names:
572 - const: pci # PCIe core reset
574 - if:
579 - qcom,pcie-sm8450-pcie1
585 clock-names:
587 - const: pipe # PIPE clock
588 - const: pipe_mux # PIPE MUX
589 - const: phy_pipe # PIPE output clock
590 - const: ref # REFERENCE clock
591 - const: aux # Auxiliary clock
592 - const: cfg # Configuration clock
593 - const: bus_master # Master AXI clock
594 - const: bus_slave # Slave AXI clock
595 - const: slave_q2a # Slave Q2A clock
596 - const: ddrss_sf_tbu # PCIe SF TBU clock
597 - const: aggre1 # Aggre NoC PCIe1 AXI clock
600 reset-names:
602 - const: pci # PCIe core reset
604 - if:
609 - qcom,pcie-sa8540p
610 - qcom,pcie-sc8280xp
616 clock-names:
619 - const: aux # Auxiliary clock
620 - const: cfg # Configuration clock
621 - const: bus_master # Master AXI clock
622 - const: bus_slave # Slave AXI clock
623 - const: slave_q2a # Slave Q2A clock
624 - const: ddrss_sf_tbu # PCIe SF TBU clock
625 - const: noc_aggr_4 # NoC aggregate 4 clock
626 - const: noc_aggr_south_sf # NoC aggregate South SF clock
627 - const: cnoc_qx # Configuration NoC QX clock
630 reset-names:
632 - const: pci # PCIe core reset
634 - if:
640 - qcom,pcie-apq8064
641 - qcom,pcie-ipq4019
642 - qcom,pcie-ipq8064
643 - qcom,pcie-ipq8064v2
644 - qcom,pcie-ipq8074
645 - qcom,pcie-qcs404
648 - power-domains
650 - if:
656 - qcom,pcie-msm8996
659 - resets
660 - reset-names
662 - if:
667 - qcom,pcie-msm8996
668 - qcom,pcie-sc7280
669 - qcom,pcie-sc8180x
670 - qcom,pcie-sdm845
671 - qcom,pcie-sm8150
672 - qcom,pcie-sm8250
673 - qcom,pcie-sm8450-pcie0
674 - qcom,pcie-sm8450-pcie1
677 - properties:
680 interrupt-names:
682 - const: msi
683 - properties:
686 interrupt-names:
688 - const: msi0
689 - const: msi1
690 - const: msi2
691 - const: msi3
692 - const: msi4
693 - const: msi5
694 - const: msi6
695 - const: msi7
697 - if:
702 - qcom,pcie-sc8280xp
708 interrupt-names:
710 - const: msi0
711 - const: msi1
712 - const: msi2
713 - const: msi3
715 - if:
720 - qcom,pcie-apq8064
721 - qcom,pcie-apq8084
722 - qcom,pcie-ipq4019
723 - qcom,pcie-ipq6018
724 - qcom,pcie-ipq8064
725 - qcom,pcie-ipq8064-v2
726 - qcom,pcie-ipq8074
727 - qcom,pcie-qcs404
728 - qcom,pcie-sa8540p
733 interrupt-names:
735 - const: msi
740 - |
741 #include <dt-bindings/interrupt-controller/arm-gic.h>
743 compatible = "qcom,pcie-ipq8064";
748 reg-names = "dbi", "elbi", "parf", "config";
750 linux,pci-domain = <0>;
751 bus-range = <0x00 0xff>;
752 num-lanes = <1>;
753 #address-cells = <3>;
754 #size-cells = <2>;
758 interrupt-names = "msi";
759 #interrupt-cells = <1>;
760 interrupt-map-mask = <0 0 0 0x7>;
761 interrupt-map = <0 0 0 1 &intc 0 36 IRQ_TYPE_LEVEL_HIGH>,
770 clock-names = "core", "iface", "phy", "aux", "ref";
777 reset-names = "axi", "ahb", "por", "pci", "phy", "ext";
778 pinctrl-0 = <&pcie_pins_default>;
779 pinctrl-names = "default";
780 vdda-supply = <&pm8921_s3>;
781 vdda_phy-supply = <&pm8921_lvs6>;
782 vdda_refclk-supply = <&ext_3p3v>;
784 - |
785 #include <dt-bindings/interrupt-controller/arm-gic.h>
786 #include <dt-bindings/gpio/gpio.h>
788 compatible = "qcom,pcie-apq8084";
793 reg-names = "parf", "dbi", "elbi", "config";
795 linux,pci-domain = <0>;
796 bus-range = <0x00 0xff>;
797 num-lanes = <1>;
798 #address-cells = <3>;
799 #size-cells = <2>;
803 interrupt-names = "msi";
804 #interrupt-cells = <1>;
805 interrupt-map-mask = <0 0 0 0x7>;
806 interrupt-map = <0 0 0 1 &intc 0 244 IRQ_TYPE_LEVEL_HIGH>,
814 clock-names = "iface", "master_bus", "slave_bus", "aux";
816 reset-names = "core";
817 power-domains = <&gcc 1>;
818 vdda-supply = <&pma8084_l3>;
820 phy-names = "pciephy";
821 perst-gpios = <&tlmm 70 GPIO_ACTIVE_LOW>;
822 pinctrl-0 = <&pcie0_pins_default>;
823 pinctrl-names = "default";