Lines Matching +full:num +full:- +full:domains
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - qcom,sdx55-pcie-ep
16 - qcom,sm8450-pcie-ep
20 - description: Qualcomm-specific PARF configuration registers
21 - description: DesignWare PCIe registers
22 - description: External local bus interface registers
23 - description: Address Translation Unit (ATU) registers
24 - description: Memory region used to map remote RC address space
25 - description: BAR memory region
27 reg-names:
29 - const: parf
30 - const: dbi
31 - const: elbi
32 - const: atu
33 - const: addr_space
34 - const: mmio
40 clock-names:
44 qcom,perst-regs:
48 $ref: "/schemas/types.yaml#/definitions/phandle-array"
55 - description: PCIe Global interrupt
56 - description: PCIe Doorbell interrupt
58 interrupt-names:
60 - const: global
61 - const: doorbell
63 reset-gpios:
67 wake-gpios:
74 reset-names:
77 power-domains:
83 phy-names:
86 num-lanes:
90 - compatible
91 - reg
92 - reg-names
93 - clocks
94 - clock-names
95 - interrupts
96 - interrupt-names
97 - reset-gpios
98 - resets
99 - reset-names
100 - power-domains
103 - $ref: pci-ep.yaml#
104 - if:
109 - qcom,sdx55-pcie-ep
114 - description: PCIe Auxiliary clock
115 - description: PCIe CFG AHB clock
116 - description: PCIe Master AXI clock
117 - description: PCIe Slave AXI clock
118 - description: PCIe Slave Q2A AXI clock
119 - description: PCIe Sleep clock
120 - description: PCIe Reference clock
121 clock-names:
123 - const: aux
124 - const: cfg
125 - const: bus_master
126 - const: bus_slave
127 - const: slave_q2a
128 - const: sleep
129 - const: ref
131 - if:
136 - qcom,sm8450-pcie-ep
141 - description: PCIe Auxiliary clock
142 - description: PCIe CFG AHB clock
143 - description: PCIe Master AXI clock
144 - description: PCIe Slave AXI clock
145 - description: PCIe Slave Q2A AXI clock
146 - description: PCIe Reference clock
147 - description: PCIe DDRSS SF TBU clock
148 - description: PCIe AGGRE NOC AXI clock
149 clock-names:
151 - const: aux
152 - const: cfg
153 - const: bus_master
154 - const: bus_slave
155 - const: slave_q2a
156 - const: ref
157 - const: ddrss_sf_tbu
158 - const: aggre_noc_axi
163 - |
164 #include <dt-bindings/clock/qcom,gcc-sdx55.h>
165 #include <dt-bindings/gpio/gpio.h>
166 #include <dt-bindings/interrupt-controller/arm-gic.h>
167 pcie_ep: pcie-ep@40000000 {
168 compatible = "qcom,sdx55-pcie-ep";
175 reg-names = "parf", "dbi", "elbi", "atu", "addr_space",
185 clock-names = "aux", "cfg", "bus_master", "bus_slave",
188 qcom,perst-regs = <&tcsr 0xb258 0xb270>;
192 interrupt-names = "global", "doorbell";
193 reset-gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
194 wake-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>;
196 reset-names = "core";
197 power-domains = <&gcc PCIE_GDSC>;
199 phy-names = "pciephy";
200 max-link-speed = <3>;
201 num-lanes = <2>;