Lines Matching +full:0 +full:x01e00000
81 - const: p2u-0
119 0: C0
128 0 : C0
231 bus@0 {
234 ranges = <0x0 0x0 0x0 0x8 0x0>;
239 reg = <0x0 0x14180000 0x0 0x00020000>, /* appl registers (128K) */
240 <0x0 0x38000000 0x0 0x00040000>, /* configuration space (256K) */
241 <0x0 0x38040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
242 <0x0 0x38080000 0x0 0x00040000>; /* DBI reg space (256K) */
249 linux,pci-domain = <0>;
252 pinctrl-0 = <&pex_rst_c5_out_state>, <&clkreq_c5_bi_dir_state>;
266 interrupt-map-mask = <0 0 0 0>;
267 interrupt-map = <0 0 0 0 &gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
269 nvidia,bpmp = <&bpmp 0>;
276 bus-range = <0x0 0xff>;
277 … ranges = <0x81000000 0x0 0x38100000 0x0 0x38100000 0x0 0x00100000>, /* downstream I/O */
278 … <0x82000000 0x0 0x38200000 0x0 0x38200000 0x0 0x01e00000>, /* non-prefetch memory */
279 … <0xc2000000 0x18 0x00000000 0x18 0x00000000 0x4 0x00000000>; /* prefetchable memory */
287 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
297 bus@0 {
300 ranges = <0x0 0x0 0x0 0x8 0x0>;
305 reg = <0x00 0x14160000 0x0 0x00020000>, /* appl registers (128K) */
306 <0x00 0x36000000 0x0 0x00040000>, /* configuration space (256K) */
307 <0x00 0x36040000 0x0 0x00040000>, /* iATU_DMA reg space (256K) */
308 <0x00 0x36080000 0x0 0x00040000>; /* DBI reg space (256K) */
330 interrupt-map-mask = <0 0 0 0>;
331 interrupt-map = <0 0 0 0 &gic GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
339 bus-range = <0x0 0xff>;
340 ranges = <0x43000000 0x21 0x40000000 0x21 0x40000000 0x2 0xe8000000>, /* prefetchable */
341 … <0x02000000 0x0 0x40000000 0x24 0x28000000 0x0 0x08000000>, /* non-prefetchable */
342 … <0x01000000 0x0 0x36100000 0x00 0x36100000 0x0 0x00100000>; /* downstream I/O */
348 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";