Lines Matching +full:opp +full:- +full:table
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. NVMEM OPP bindings
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
17 the CPU frequencies subset and voltage value of each OPP varies based on
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
23 the OPP framework with required information (existing HW bitmap).
24 This is used to determine the voltage and frequency value for each OPP of
25 operating-points-v2 table when it is parsed by the OPP framework.
29 const: operating-points-v2-kryo-cpu
31 nvmem-cells:
33 A phandle pointing to a nvmem-cells node representing the
38 opp-shared: true
41 '^opp-?[0-9]+$':
46 opp-hz: true
48 opp-microvolt: true
50 opp-supported-hw:
57 3-31: unused
60 clock-latency-ns: true
62 required-opps: true
65 - opp-hz
68 - compatible
72 - nvmem-cells
75 '^opp-?[0-9]+$':
77 - opp-supported-hw
82 - |
85 compatible = "arrow,apq8096-db820c", "qcom,apq8096-sbc", "qcom,apq8096";
86 #address-cells = <2>;
87 #size-cells = <2>;
90 #address-cells = <2>;
91 #size-cells = <0>;
97 enable-method = "psci";
98 cpu-idle-states = <&CPU_SLEEP_0>;
99 capacity-dmips-mhz = <1024>;
101 operating-points-v2 = <&cluster0_opp>;
102 power-domains = <&cpr>;
103 power-domain-names = "cpr";
104 #cooling-cells = <2>;
105 next-level-cache = <&L2_0>;
106 L2_0: l2-cache {
108 cache-level = <2>;
116 enable-method = "psci";
117 cpu-idle-states = <&CPU_SLEEP_0>;
118 capacity-dmips-mhz = <1024>;
120 operating-points-v2 = <&cluster0_opp>;
121 power-domains = <&cpr>;
122 power-domain-names = "cpr";
123 #cooling-cells = <2>;
124 next-level-cache = <&L2_0>;
131 enable-method = "psci";
132 cpu-idle-states = <&CPU_SLEEP_0>;
133 capacity-dmips-mhz = <1024>;
135 operating-points-v2 = <&cluster1_opp>;
136 power-domains = <&cpr>;
137 power-domain-names = "cpr";
138 #cooling-cells = <2>;
139 next-level-cache = <&L2_1>;
140 L2_1: l2-cache {
142 cache-level = <2>;
150 enable-method = "psci";
151 cpu-idle-states = <&CPU_SLEEP_0>;
152 capacity-dmips-mhz = <1024>;
154 operating-points-v2 = <&cluster1_opp>;
155 power-domains = <&cpr>;
156 power-domain-names = "cpr";
157 #cooling-cells = <2>;
158 next-level-cache = <&L2_1>;
161 cpu-map {
184 cluster0_opp: opp-table-0 {
185 compatible = "operating-points-v2-kryo-cpu";
186 nvmem-cells = <&speedbin_efuse>;
187 opp-shared;
189 opp-307200000 {
190 opp-hz = /bits/ 64 <307200000>;
191 opp-microvolt = <905000 905000 1140000>;
192 opp-supported-hw = <0x7>;
193 clock-latency-ns = <200000>;
194 required-opps = <&cpr_opp1>;
196 opp-1401600000 {
197 opp-hz = /bits/ 64 <1401600000>;
198 opp-microvolt = <1140000 905000 1140000>;
199 opp-supported-hw = <0x5>;
200 clock-latency-ns = <200000>;
201 required-opps = <&cpr_opp2>;
203 opp-1593600000 {
204 opp-hz = /bits/ 64 <1593600000>;
205 opp-microvolt = <1140000 905000 1140000>;
206 opp-supported-hw = <0x1>;
207 clock-latency-ns = <200000>;
208 required-opps = <&cpr_opp3>;
212 cluster1_opp: opp-table-1 {
213 compatible = "operating-points-v2-kryo-cpu";
214 nvmem-cells = <&speedbin_efuse>;
215 opp-shared;
217 opp-307200000 {
218 opp-hz = /bits/ 64 <307200000>;
219 opp-microvolt = <905000 905000 1140000>;
220 opp-supported-hw = <0x7>;
221 clock-latency-ns = <200000>;
222 required-opps = <&cpr_opp1>;
224 opp-1804800000 {
225 opp-hz = /bits/ 64 <1804800000>;
226 opp-microvolt = <1140000 905000 1140000>;
227 opp-supported-hw = <0x6>;
228 clock-latency-ns = <200000>;
229 required-opps = <&cpr_opp4>;
231 opp-1900800000 {
232 opp-hz = /bits/ 64 <1900800000>;
233 opp-microvolt = <1140000 905000 1140000>;
234 opp-supported-hw = <0x4>;
235 clock-latency-ns = <200000>;
236 required-opps = <&cpr_opp5>;
238 opp-2150400000 {
239 opp-hz = /bits/ 64 <2150400000>;
240 opp-microvolt = <1140000 905000 1140000>;
241 opp-supported-hw = <0x1>;
242 clock-latency-ns = <200000>;
243 required-opps = <&cpr_opp6>;
249 memory-region = <&smem_mem>;
254 #address-cells = <1>;
255 #size-cells = <1>;
258 compatible = "qcom,msm8996-qfprom", "qcom,qfprom";
260 #address-cells = <1>;
261 #size-cells = <1>;