Lines Matching +full:0 +full:xf007
19 The internal Communications Port Programming Interface (CPPI5) (Host port 0).
20 Host Port 0 CPPI Packet Streaming Interface interface supports 8 TX channels
27 Support for Audio/Video Bridging (P802.1Qav/D6.0)
31 IEEE P902.3br/D2.0 Interspersing Express Traffic
111 const: 0
157 "^mdio@[0-9a-f]+$":
164 "^cpts@[0-9a-f]+":
214 reg = <0x0 0x46000000 0x0 0x200000>;
216 ranges = <0x0 0x0 0x0 0x46000000 0x0 0x200000>;
222 pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
224 dmas = <&mcu_udmap 0xf000>,
225 <&mcu_udmap 0xf001>,
226 <&mcu_udmap 0xf002>,
227 <&mcu_udmap 0xf003>,
228 <&mcu_udmap 0xf004>,
229 <&mcu_udmap 0xf005>,
230 <&mcu_udmap 0xf006>,
231 <&mcu_udmap 0xf007>,
232 <&mcu_udmap 0x7000>;
238 #size-cells = <0>;
244 ti,syscon-efuse = <&mcu_conf 0x200>;
254 reg = <0x0 0xf00 0x0 0x100>;
256 #size-cells = <0>;
261 phy0: ethernet-phy@0 {
262 reg = <0>;
271 reg = <0x0 0x3d000 0x0 0x400>;