Lines Matching +full:tx +full:- +full:queues +full:- +full:to +full:- +full:use
1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
15 # will be able to report a warning when we have that compatible, since
16 # we will validate the node thanks to the select, but won't report it
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
27 - snps,dwmac-3.70a
28 - snps,dwmac-3.710
29 - snps,dwmac-4.00
30 - snps,dwmac-4.10a
31 - snps,dwmac-4.20a
32 - snps,dwmac-5.10a
33 - snps,dwxgmac
34 - snps,dwxgmac-2.10
37 - st,spear600-gmac
40 - compatible
44 # We need to include all the compatibles from schemas that will
50 - allwinner,sun7i-a20-gmac
51 - allwinner,sun8i-a83t-emac
52 - allwinner,sun8i-h3-emac
53 - allwinner,sun8i-r40-gmac
54 - allwinner,sun8i-v3s-emac
55 - allwinner,sun50i-a64-emac
56 - amlogic,meson6-dwmac
57 - amlogic,meson8b-dwmac
58 - amlogic,meson8m2-dwmac
59 - amlogic,meson-gxbb-dwmac
60 - amlogic,meson-axg-dwmac
61 - ingenic,jz4775-mac
62 - ingenic,x1000-mac
63 - ingenic,x1600-mac
64 - ingenic,x1830-mac
65 - ingenic,x2000-mac
66 - loongson,ls2k-dwmac
67 - loongson,ls7a-dwmac
68 - renesas,r9a06g032-gmac
69 - renesas,rzn1-gmac
70 - rockchip,px30-gmac
71 - rockchip,rk3128-gmac
72 - rockchip,rk3228-gmac
73 - rockchip,rk3288-gmac
74 - rockchip,rk3328-gmac
75 - rockchip,rk3366-gmac
76 - rockchip,rk3368-gmac
77 - rockchip,rk3588-gmac
78 - rockchip,rk3399-gmac
79 - rockchip,rv1108-gmac
80 - snps,dwmac
81 - snps,dwmac-3.40a
82 - snps,dwmac-3.50a
83 - snps,dwmac-3.610
84 - snps,dwmac-3.70a
85 - snps,dwmac-3.710
86 - snps,dwmac-4.00
87 - snps,dwmac-4.10a
88 - snps,dwmac-4.20a
89 - snps,dwmac-5.10a
90 - snps,dwxgmac
91 - snps,dwxgmac-2.10
100 - description: Combined signal for various interrupt events
101 - description: The interrupt to manage the remote wake-up packet detection
102 - description: The interrupt that occurs when Rx exits the LPI state
104 interrupt-names:
107 - const: macirq
108 - const: eth_wake_irq
109 - const: eth_lpi
116 - description: GMAC main clock
117 - description: Peripheral registers interface clock
118 - description:
123 clock-names:
129 - stmmaceth
130 - pclk
131 - ptp_ref
138 reset-names:
141 power-domains:
144 mac-mode:
145 $ref: ethernet-controller.yaml#/properties/phy-connection-type
147 The property is identical to 'phy-mode', and assumes that there is mode
148 converter in-between the MAC & PHY (e.g. GMII-to-RGMII). This converter
150 in a different mode than the PHY in order to function.
152 snps,axi-config:
155 AXI BUS Mode parameters. Phandle to a node that can contain the
163 * snps,fb, fixed-burst
164 * snps,mb, mixed-burst
167 snps,mtl-rx-config:
170 Multiple RX Queues parameters. Phandle to a node that can
172 * snps,rx-queues-to-use, number of RX queues to be used in the
175 * snps,rx-sched-sp, Strict priority
176 * snps,rx-sched-wsp, Weighted Strict priority
179 * snps,dcb-algorithm, Queue to be enabled as DCB
180 * snps,avb-algorithm, Queue to be enabled as AVB
181 * snps,map-to-dma-channel, Channel to map
183 * snps,route-avcp, AV Untagged Control packets
184 * snps,route-ptp, PTP Packets
185 * snps,route-dcbcp, DCB Control Packets
186 * snps,route-up, Untagged Packets
187 * snps,route-multi-broad, Multicast & Broadcast Packets
188 * snps,priority, bitmask of the tagged frames priorities assigned to
191 snps,mtl-tx-config:
194 Multiple TX Queues parameters. Phandle to a node that can
196 * snps,tx-queues-to-use, number of TX queues to be used in the
198 * Choose one of these TX scheduling algorithms
199 * snps,tx-sched-wrr, Weighted Round Robin
200 * snps,tx-sched-wfq, Weighted Fair Queuing
201 * snps,tx-sched-dwrr, Deficit Weighted Round Robin
202 * snps,tx-sched-sp, Strict priority
203 * For each TX queue
204 * snps,weight, TX queue weight (if using a DCB weight
207 * snps,dcb-algorithm, TX queue will be working in DCB
208 * snps,avb-algorithm, TX queue will be working in AVB
216 * snps,priority, bitmask of the priorities assigned to the queue.
221 snps,reset-gpio:
227 snps,reset-active-low:
233 snps,reset-delays-us:
236 Triplet of delays. The 1st cell is reset pre-delay in micro
238 cell is reset post-delay in micro seconds.
245 Use Address-Aligned Beats
247 snps,fixed-burst:
250 Program the DMA to use the fixed burst mode
252 snps,mixed-burst:
255 Program the DMA to use the mixed burst mode
260 Force DMA to use the threshold mode for both tx and rx
265 Force DMA to use the Store and Forward mode for both tx and
268 snps,en-tx-lpi-clockgating:
271 Enable gating of the MAC TX clock during TX low-power mode
273 snps,multicast-filter-bins:
279 snps,perfect-filter-entries:
285 snps,ps-speed:
288 Port selection speed that can be passed to the core when PCS
292 snps,clk-csr:
305 const: snps,dwmac-mdio
308 - compatible
310 stmmac-axi-config:
343 $ref: /schemas/types.yaml#/definitions/uint32-array
352 fixed-burst
357 mixed-burst
365 - compatible
366 - reg
367 - interrupts
368 - interrupt-names
369 - phy-mode
372 snps,reset-active-low: ["snps,reset-gpio"]
373 snps,reset-delay-us: ["snps,reset-gpio"]
376 - $ref: "ethernet-controller.yaml#"
377 - if:
382 - allwinner,sun7i-a20-gmac
383 - allwinner,sun8i-a83t-emac
384 - allwinner,sun8i-h3-emac
385 - allwinner,sun8i-r40-gmac
386 - allwinner,sun8i-v3s-emac
387 - allwinner,sun50i-a64-emac
388 - ingenic,jz4775-mac
389 - ingenic,x1000-mac
390 - ingenic,x1600-mac
391 - ingenic,x1830-mac
392 - ingenic,x2000-mac
393 - snps,dwmac-3.50a
394 - snps,dwmac-4.10a
395 - snps,dwmac-4.20a
396 - snps,dwxgmac
397 - snps,dwxgmac-2.10
398 - st,spear600-gmac
404 Programmable Burst Length (tx and rx)
410 Tx Programmable Burst Length. If set, DMA tx will use this
417 Rx Programmable Burst Length. If set, DMA rx will use this
422 snps,no-pbl-x8:
428 - if:
433 - allwinner,sun7i-a20-gmac
434 - allwinner,sun8i-a83t-emac
435 - allwinner,sun8i-h3-emac
436 - allwinner,sun8i-r40-gmac
437 - allwinner,sun8i-v3s-emac
438 - allwinner,sun50i-a64-emac
439 - loongson,ls2k-dwmac
440 - loongson,ls7a-dwmac
441 - ingenic,jz4775-mac
442 - ingenic,x1000-mac
443 - ingenic,x1600-mac
444 - ingenic,x1830-mac
445 - ingenic,x2000-mac
446 - snps,dwmac-4.00
447 - snps,dwmac-4.10a
448 - snps,dwmac-4.20a
449 - snps,dwmac-5.10a
450 - snps,dwxgmac
451 - snps,dwxgmac-2.10
452 - st,spear600-gmac
465 - |
466 stmmac_axi_setup: stmmac-axi-config {
472 mtl_rx_setup: rx-queues-config {
473 snps,rx-queues-to-use = <1>;
474 snps,rx-sched-sp;
476 snps,dcb-algorithm;
477 snps,map-to-dma-channel = <0x0>;
482 mtl_tx_setup: tx-queues-config {
483 snps,tx-queues-to-use = <2>;
484 snps,tx-sched-wrr;
487 snps,dcb-algorithm;
492 snps,avb-algorithm;
502 compatible = "snps,dwxgmac-2.10", "snps,dwxgmac";
504 interrupt-parent = <&vic1>;
506 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
507 mac-address = [000000000000]; /* Filled in by U-Boot */
508 max-frame-size = <3800>;
509 phy-mode = "gmii";
510 snps,multicast-filter-bins = <256>;
511 snps,perfect-filter-entries = <128>;
512 rx-fifo-depth = <16384>;
513 tx-fifo-depth = <16384>;
515 clock-names = "stmmaceth";
516 snps,axi-config = <&stmmac_axi_setup>;
517 snps,mtl-rx-config = <&mtl_rx_setup>;
518 snps,mtl-tx-config = <&mtl_tx_setup>;
520 #address-cells = <1>;
521 #size-cells = <0>;
522 compatible = "snps,dwmac-mdio";
523 phy1: ethernet-phy@0 {